JPS55108065A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS55108065A
JPS55108065A JP1518979A JP1518979A JPS55108065A JP S55108065 A JPS55108065 A JP S55108065A JP 1518979 A JP1518979 A JP 1518979A JP 1518979 A JP1518979 A JP 1518979A JP S55108065 A JPS55108065 A JP S55108065A
Authority
JP
Japan
Prior art keywords
register
memory
program
arrangement
user
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1518979A
Other languages
Japanese (ja)
Inventor
Mitsuo Terajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1518979A priority Critical patent/JPS55108065A/en
Publication of JPS55108065A publication Critical patent/JPS55108065A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable dynamic location in memory space, by detecting either of control area or user area is accessed and indicating the result to the memory.
CONSTITUTION: The base register 10 is provided in either of the control area where the firmwear is stored or the user area in which the user's program is stored, and the arrangement of program is changed by rewriting the base value of the register 40. Further, the attribute register 30 stores the attribute corresponding to the address of memory according to the program arrangement, FF34 detects that either of the memories is accessed, memory is designated, and mutual invasion is detected from FF43 and the content written in the register 30. Thus, dynamic arrangement in memory space can be made.
COPYRIGHT: (C)1980,JPO&Japio
JP1518979A 1979-02-13 1979-02-13 Memory control system Pending JPS55108065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1518979A JPS55108065A (en) 1979-02-13 1979-02-13 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1518979A JPS55108065A (en) 1979-02-13 1979-02-13 Memory control system

Publications (1)

Publication Number Publication Date
JPS55108065A true JPS55108065A (en) 1980-08-19

Family

ID=11881890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1518979A Pending JPS55108065A (en) 1979-02-13 1979-02-13 Memory control system

Country Status (1)

Country Link
JP (1) JPS55108065A (en)

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