JPS57189400A - Incorrect address detector - Google Patents

Incorrect address detector

Info

Publication number
JPS57189400A
JPS57189400A JP56074506A JP7450681A JPS57189400A JP S57189400 A JPS57189400 A JP S57189400A JP 56074506 A JP56074506 A JP 56074506A JP 7450681 A JP7450681 A JP 7450681A JP S57189400 A JPS57189400 A JP S57189400A
Authority
JP
Japan
Prior art keywords
address
packaged
memory
information
areas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56074506A
Other languages
Japanese (ja)
Inventor
Kenji Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56074506A priority Critical patent/JPS57189400A/en
Publication of JPS57189400A publication Critical patent/JPS57189400A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To obtain a detector that adapts itself flexibly to system constitution by reading out information from an address package area table by using the address of the time when a microprocessor accesses a memory.
CONSTITUTION: An address packaged area table 10 which stores the signals discriminating the address packaged areas and address non-packaged areas of a memory 2 which a microporcessor 1 uses into said corresponding addresses is provided. The information relating to the address packaged areas of the memory 2 is written into the table 10 by the execution of the initiation program of the microprocessor 1. Further, the information is read out from the table 10 by using the address of the time when the microprocessor 1 accesses the memory 2 and when the information which is the address non-packaged area is obtained, it is recognized that said access is to the incorrect address.
COPYRIGHT: (C)1982,JPO&Japio
JP56074506A 1981-05-18 1981-05-18 Incorrect address detector Pending JPS57189400A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56074506A JPS57189400A (en) 1981-05-18 1981-05-18 Incorrect address detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56074506A JPS57189400A (en) 1981-05-18 1981-05-18 Incorrect address detector

Publications (1)

Publication Number Publication Date
JPS57189400A true JPS57189400A (en) 1982-11-20

Family

ID=13549269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56074506A Pending JPS57189400A (en) 1981-05-18 1981-05-18 Incorrect address detector

Country Status (1)

Country Link
JP (1) JPS57189400A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014345A (en) * 1983-07-05 1985-01-24 Fuji Xerox Co Ltd Protecting system of program runaway
JPS61133436A (en) * 1984-12-03 1986-06-20 Nec Corp Data processing unit
JPH01134644A (en) * 1987-11-12 1989-05-26 Internatl Business Mach Corp <Ibm> Memory addressing error detection circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014345A (en) * 1983-07-05 1985-01-24 Fuji Xerox Co Ltd Protecting system of program runaway
JPS61133436A (en) * 1984-12-03 1986-06-20 Nec Corp Data processing unit
JPH01134644A (en) * 1987-11-12 1989-05-26 Internatl Business Mach Corp <Ibm> Memory addressing error detection circuit

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