JPS55104123A - Variable direct current voltage generating circuit - Google Patents
Variable direct current voltage generating circuitInfo
- Publication number
- JPS55104123A JPS55104123A JP1176079A JP1176079A JPS55104123A JP S55104123 A JPS55104123 A JP S55104123A JP 1176079 A JP1176079 A JP 1176079A JP 1176079 A JP1176079 A JP 1176079A JP S55104123 A JPS55104123 A JP S55104123A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- pulse signal
- fed
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/02—Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform
- H03K4/026—Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform using digital techniques
Landscapes
- Direct Current Feeding And Distribution (AREA)
- Networks Using Active Elements (AREA)
Abstract
PURPOSE:To obtain the DC voltage changed in step, by generating the pulse signal of a given period and converting into DC voltage through a given number of count of pulse signals up or down direction at the up and down counter by means of designation signal. CONSTITUTION:The pulse signal of a given period is generated with the pulse signal generating circuit 10, this pulse signal is frequency divided at the frequency dividing circuit 20, and clock signal is generated with the timer circuit 30 from the output of the circuit 20. The Vref terminal is made to level 1 with the application of power supply to start the circut 10. With this state, when the signal is fed to the UP terminal with push button, the pulse signal from the circuit 20 is fed to the up down counter 60 via the control circuit 40. While the push button is depressed at the counter 60, the pulse signal is counted and this output is fed to the output circuit 70. The circuit 7 converts the multi-bit digital signal from the counter 60 into DC voltage for conversion in step. Since the circuit 10 is operative only when the instruction signal is fed, no effect is made to the receiver from the pulses of the circuit 10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1176079A JPS55104123A (en) | 1979-02-02 | 1979-02-02 | Variable direct current voltage generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1176079A JPS55104123A (en) | 1979-02-02 | 1979-02-02 | Variable direct current voltage generating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55104123A true JPS55104123A (en) | 1980-08-09 |
Family
ID=11786930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1176079A Pending JPS55104123A (en) | 1979-02-02 | 1979-02-02 | Variable direct current voltage generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55104123A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271966A (en) * | 1975-12-11 | 1977-06-15 | Matsushita Electric Ind Co Ltd | Triangular wave generator |
-
1979
- 1979-02-02 JP JP1176079A patent/JPS55104123A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271966A (en) * | 1975-12-11 | 1977-06-15 | Matsushita Electric Ind Co Ltd | Triangular wave generator |
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