JPS55103660A - Data processing unit - Google Patents

Data processing unit

Info

Publication number
JPS55103660A
JPS55103660A JP1014679A JP1014679A JPS55103660A JP S55103660 A JPS55103660 A JP S55103660A JP 1014679 A JP1014679 A JP 1014679A JP 1014679 A JP1014679 A JP 1014679A JP S55103660 A JPS55103660 A JP S55103660A
Authority
JP
Japan
Prior art keywords
data
address
address signal
same
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1014679A
Other languages
Japanese (ja)
Other versions
JPS6329295B2 (en
Inventor
Soichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1014679A priority Critical patent/JPS55103660A/en
Publication of JPS55103660A publication Critical patent/JPS55103660A/en
Publication of JPS6329295B2 publication Critical patent/JPS6329295B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to execute the processing of bit data efficiently by making it possible to perform byte data designation and bit data designation for a memory address signal by an address signal having the same address space.
CONSTITUTION: Data processing part 2 addresses respective ports of the I/O part by the same address signal as the address signal designating memory part 1 or address data having the same length and the same numeric value as address data read from memory part 1. By this addressing, data of bit units or data of byte units can be inputted to the data bus according to the address value. That is, byte data designation and bit data designation for the memory address signal can be performed by the address signal having the same address space, so that the processing of bit data can be executed efficiently.
COPYRIGHT: (C)1980,JPO&Japio
JP1014679A 1979-01-31 1979-01-31 Data processing unit Granted JPS55103660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1014679A JPS55103660A (en) 1979-01-31 1979-01-31 Data processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1014679A JPS55103660A (en) 1979-01-31 1979-01-31 Data processing unit

Publications (2)

Publication Number Publication Date
JPS55103660A true JPS55103660A (en) 1980-08-08
JPS6329295B2 JPS6329295B2 (en) 1988-06-13

Family

ID=11742137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1014679A Granted JPS55103660A (en) 1979-01-31 1979-01-31 Data processing unit

Country Status (1)

Country Link
JP (1) JPS55103660A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2616246A1 (en) * 1987-06-08 1988-12-09 Teradyne Inc AUTOMATIC MEMORY CONTROL APPARATUS FOR PROCESSING FAULT INFORMATION OF MEMORY UNDER CONTROL

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2616246A1 (en) * 1987-06-08 1988-12-09 Teradyne Inc AUTOMATIC MEMORY CONTROL APPARATUS FOR PROCESSING FAULT INFORMATION OF MEMORY UNDER CONTROL

Also Published As

Publication number Publication date
JPS6329295B2 (en) 1988-06-13

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