JPS55102949A - Data correction circuit - Google Patents
Data correction circuitInfo
- Publication number
- JPS55102949A JPS55102949A JP1010379A JP1010379A JPS55102949A JP S55102949 A JPS55102949 A JP S55102949A JP 1010379 A JP1010379 A JP 1010379A JP 1010379 A JP1010379 A JP 1010379A JP S55102949 A JPS55102949 A JP S55102949A
- Authority
- JP
- Japan
- Prior art keywords
- value
- decoding
- register
- data
- matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1806—Pulse code modulation systems for audio signals
- G11B20/1813—Pulse code modulation systems for audio signals by adding special bits or symbols to the coded information
Abstract
PURPOSE:To attain LSI-implementation by a simple circuit and also to make high- speed operation possible by eliminating the need for ROM of large capacity by setting an initial value to a certain value and then by generating a decoding M matrix by a decoding M-matrix generator of a linear feedback shift register circuit. CONSTITUTION:A circuit which corrects an error word by a check code generated by adding a corresponding bit of a signal processed by a check code with an added corresponding bit of an information word and the auxiliary matrix of a polynomial is provided with linear feedback shift register 21 as a decoding M-matrix generator. To initial-value data setting part 22, a value needed to decode data am or a1 among data a1, a2...ag...am to be decoded or a value obtained by reversely shifting it by one by register 21 is set as the initial value of register 21, and a decoding signal is derived from this initial value or that one-shift behind. In a state where data ag is decoded, addition to the input of register 21 is done through exclusive OREX-OR1 and EX-OR2 for an error check.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1010379A JPS55102949A (en) | 1979-01-31 | 1979-01-31 | Data correction circuit |
GB8002535A GB2042228B (en) | 1979-01-31 | 1980-01-25 | Data correcting system |
US06/116,555 US4320510A (en) | 1979-01-31 | 1980-01-29 | Error data correcting system |
DE19803003502 DE3003502A1 (en) | 1979-01-31 | 1980-01-31 | DATA ERROR CORRECTION SYSTEM |
FR8002113A FR2448255A1 (en) | 1979-01-31 | 1980-01-31 | DEVICE FOR CORRECTING ERRORS IN DIGITAL DATA |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1010379A JPS55102949A (en) | 1979-01-31 | 1979-01-31 | Data correction circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55102949A true JPS55102949A (en) | 1980-08-06 |
Family
ID=11740972
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1010379A Pending JPS55102949A (en) | 1979-01-31 | 1979-01-31 | Data correction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55102949A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60213131A (en) * | 1984-03-05 | 1985-10-25 | アムペックス コーポレーシヨン | Parity and syndrome generator for detecting and correcting error of digital communication system |
-
1979
- 1979-01-31 JP JP1010379A patent/JPS55102949A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60213131A (en) * | 1984-03-05 | 1985-10-25 | アムペックス コーポレーシヨン | Parity and syndrome generator for detecting and correcting error of digital communication system |
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