KR940010800A

KR940010800A - Variable length decoder

Info

Publication number: KR940010800A
Application number: KR1019920020265A
Authority: KR
Inventors: 김재현; 장광욱
Original assignee: 윤종용; 삼성전자 주식회사
Priority date: 1992-10-30
Filing date: 1992-10-30
Publication date: 1994-05-26
Also published as: KR0166721B1

Abstract

코드워드와 여분비트로 구성되어 있는 허프만코드 신호를 복호화하기 위해서 매 클럭마다 코드워드와 여분비트를 합한 전체 코드의 길이만큼씩 시프트되는 제1배럴시프터와, 복호화과정에서 시프트되는 비트수를 누적하여 연산함으로써 데이타신호가 전송되어야 할 시점을 캐리신호를 통하여 제어하는 누산기와, 제1배럴시프터로부터 출력된 데이타신호로부터 코드워드와 여분비트를 분리하는 제1룩업테이블과, 제1룩업테이블의 출력신호에 따라 매 클럭마다 코드워드의 길이만큼씩 시프트됨으로써 코드워드를 제거하는 제2배럴시프터와, 제2배럴시프터의 여분비트 출력신호에 심볼을 복호화하는 제2룩업테이블로 구성되어, 복호화과정에서 일정한 길이로 출력되는 모듈의 다음단에 연결되어 코드워드와 여분비트를 각기 분리하고 심볼을 나타내는 여분비트를 최종적으로 복호화함으로써 코드워드와 여분비트로 구성된 허프만코드를 복호화한 심볼의 실시간 처리가 가능하고 보다 효율적인 방법으로 복호화과정을 수행할 수 있는 가변장 복호화기에 관한 것이다.In order to decode the Huffman code signal composed of the codeword and the extra bits, the first barrel shifter shifts by the length of the entire code of the codeword and the extra bits for each clock, and the cumulative number of bits shifted during the decoding process is accumulated. Thus, an accumulator for controlling the time at which the data signal should be transmitted through the carry signal, a first lookup table for separating codewords and extra bits from the data signal output from the first barrel shifter, and an output signal of the first lookup table. The second barrel shifter removes the codeword by shifting the length of the codeword by every clock, and the second lookup table decodes the symbols in the extra bit output signal of the second barrel shifter. Connected to the next stage of the output module to separate the codeword and extra bits respectively and represent the symbol. By decoding the spare bit it will finally relates to a code word and a redundant bit is configured Huffman variable length with a real-time processing of decoding the code symbol to be and to perform the decoding process in a more efficient decoding method.

Description

Variable length decoder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 실시예에 따른 가변장 복호화기의 블럭도.2 is a block diagram of a variable length decoder according to an embodiment of the present invention.

Claims

In order to decode the Huffman code signal composed of the codeword and the extra bits, the first barrel shifter shifts by the length of the entire code of the codeword and the extra bits for each clock, and the cumulative number of bits shifted during the decoding process is accumulated. Thus, an accumulator for controlling the time at which the data signal should be transmitted through the carry signal, a first lookup table for separating codewords and extra bits from the data signal output from the first barrel shifter, and an output signal of the first lookup table. And a second barrel shifter for removing the codeword by shifting the length of the codeword by every clock, and a second lookup table for decoding the symbols in the extra bit output signal of the second barrel shifter. group.

The method of claim 1, wherein the output of the first lookup table includes a 9-bit signal having two different information, wherein the upper 5-bit signal is a sum of lengths of codewords and extra bits. And a lower four bit signal is used as a control signal of the second barrel shifter as a value representing the length of the codeword.

2. The variable length decoder of claim 1, wherein the first barrel shifter outputs a 32-bit bit string from which a codeword plus extra bits are added to one clock.

The variable length decoder of claim 1, wherein the second barrel shifter outputs an extra bit representing a symbol excluding a codeword to one clock.

※ Note: The disclosure is based on the initial application.