JPS5499539A - Digital jitter generator - Google Patents

Digital jitter generator

Info

Publication number
JPS5499539A
JPS5499539A JP639378A JP639378A JPS5499539A JP S5499539 A JPS5499539 A JP S5499539A JP 639378 A JP639378 A JP 639378A JP 639378 A JP639378 A JP 639378A JP S5499539 A JPS5499539 A JP S5499539A
Authority
JP
Japan
Prior art keywords
clock
mrad
jitter
digital
fixed oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP639378A
Other languages
Japanese (ja)
Other versions
JPS588179B2 (en
Inventor
Masahiro Ko
Sunao Sato
Mamoru Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53006393A priority Critical patent/JPS588179B2/en
Publication of JPS5499539A publication Critical patent/JPS5499539A/en
Publication of JPS588179B2 publication Critical patent/JPS588179B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02—Digital function generators
    • G06F1/025—Digital function generators for functions having two-valued amplitude, e.g. Walsh functions

Abstract

PURPOSE:To secure the steady generation of the jitter of a large amplitude by using the fixed oscillator and the digital circuit fot the constitution and converting the modulation signal into the digital signal to control the output of the fixed oscillator in a digital way. CONSTITUTION:Control circuit 24 supplies the control clock featuring the integer (M)-multiplied frequency compared with the input clock frequency through the fixed oscillator to produce the M-phase clocks featuring the phases shifted by 2pi/ Mrad to each other. Thus, the phase modulation of + or -2pi/Mrad is given to each clock pulse in corredpondence to the encoded signal given from DELTAM encoder 23. In other words, the output clock added with the jitter of + or -2pi/Mrad is generated to be applied to reading address counter 21 and encoder 23. Thus, counter 21 produces the reading address based on the output clock to apply it to elastic store 19, and the data added with the jitter is delivered 15 from store 19.
JP53006393A 1978-01-24 1978-01-24 Digital jitter generator Expired JPS588179B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53006393A JPS588179B2 (en) 1978-01-24 1978-01-24 Digital jitter generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53006393A JPS588179B2 (en) 1978-01-24 1978-01-24 Digital jitter generator

Publications (2)

Publication Number Publication Date
JPS5499539A true JPS5499539A (en) 1979-08-06
JPS588179B2 JPS588179B2 (en) 1983-02-15

Family

ID=11637114

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53006393A Expired JPS588179B2 (en) 1978-01-24 1978-01-24 Digital jitter generator

Country Status (1)

Country Link
JP (1) JPS588179B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7665004B2 (en) * 2004-06-09 2010-02-16 Advantest Corporation Timing generator and semiconductor testing apparatus
JP2014127922A (en) * 2012-12-27 2014-07-07 Leader Electronics Corp Method and apparatus for generating jitter-related data

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7665004B2 (en) * 2004-06-09 2010-02-16 Advantest Corporation Timing generator and semiconductor testing apparatus
JP2014127922A (en) * 2012-12-27 2014-07-07 Leader Electronics Corp Method and apparatus for generating jitter-related data
US9538050B2 (en) 2012-12-27 2017-01-03 Leader Electronics Corp. Method and apparatus for generating jitter-related data

Also Published As

Publication number Publication date
JPS588179B2 (en) 1983-02-15

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