JPS5495129A - Information processing unit - Google Patents

Information processing unit

Info

Publication number
JPS5495129A
JPS5495129A JP199678A JP199678A JPS5495129A JP S5495129 A JPS5495129 A JP S5495129A JP 199678 A JP199678 A JP 199678A JP 199678 A JP199678 A JP 199678A JP S5495129 A JPS5495129 A JP S5495129A
Authority
JP
Japan
Prior art keywords
address
operand
control signal
control part
extends
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP199678A
Other languages
Japanese (ja)
Other versions
JPS6053895B2 (en
Inventor
Tsuneo Urashiro
Kenji Hayashi
Chikahiko Izumi
Hiroo Miyadera
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53001996A priority Critical patent/JPS6053895B2/en
Publication of JPS5495129A publication Critical patent/JPS5495129A/en
Publication of JPS6053895B2 publication Critical patent/JPS6053895B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342Extension of operand address space
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To change the address effective range of an instruction address and the effective range of an operand address at an address generation time by causing a control signal, which extends the operand from an mode control part, to generate another control signal which extends these ragnes. CONSTITUTION:Address data 16 from instruction fetch control part 22, address data 17 from operand fetch control part 23, and address data 18 from execution part 24 are inputted to the selector circuit of memory control part 25, and one of them is selected as address data 8 in a control circuit. When the reguest from control part 23 or execution part 24 is selected by priority order dtermination circuit 9, control signal 20 is issued, and control signal 12 which extends the operand from mode control part 21 generates a control signal, which extends ranges, by AND circuit 11. As a result, the address effective range of an instruction address and the address effective range of an operand address can be changed at an address generation time.
JP53001996A 1978-01-13 1978-01-13 information processing equipment Expired JPS6053895B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53001996A JPS6053895B2 (en) 1978-01-13 1978-01-13 information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53001996A JPS6053895B2 (en) 1978-01-13 1978-01-13 information processing equipment

Publications (2)

Publication Number Publication Date
JPS5495129A true JPS5495129A (en) 1979-07-27
JPS6053895B2 JPS6053895B2 (en) 1985-11-27

Family

ID=11517055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53001996A Expired JPS6053895B2 (en) 1978-01-13 1978-01-13 information processing equipment

Country Status (1)

Country Link
JP (1) JPS6053895B2 (en)

Also Published As

Publication number Publication date
JPS6053895B2 (en) 1985-11-27

Similar Documents

Publication Publication Date Title
JPS5447438A (en) Control system for scratch memory
JPS5495129A (en) Information processing unit
JPS55138156A (en) Information processor
JPS5555490A (en) Memory control system
JPS5392638A (en) Information processing unit
JPS5491151A (en) Internal memory control system on array processor
JPS5657111A (en) Sequence controller
JPS5474338A (en) Information processor
JPS5785148A (en) Instruction sequence control device
JPS5474337A (en) Microprogram controller
JPS5785162A (en) Picture memory access control system
JPS5510660A (en) Data processor
JPS55115159A (en) Information processing unit
JPS55134450A (en) Microprogram control unit
JPS54122039A (en) Electronic computer
JPS5475961A (en) Microprogram address control system
JPS5696336A (en) Processing system for multilayer level microprogram
JPS5447455A (en) Data processor
JPS54129934A (en) Data access control system
JPS55123737A (en) Microprogram address control system
JPS5523563A (en) Computer system
JPS56124954A (en) Advance control type information processing equipment
JPS5448459A (en) Control unit of instruction advance fetch
JPS5467179A (en) Control system
JPS55166747A (en) Data processor