JPS5493931A - Data take-in system - Google Patents

Data take-in system

Info

Publication number
JPS5493931A
JPS5493931A JP17378A JP17378A JPS5493931A JP S5493931 A JPS5493931 A JP S5493931A JP 17378 A JP17378 A JP 17378A JP 17378 A JP17378 A JP 17378A JP S5493931 A JPS5493931 A JP S5493931A
Authority
JP
Japan
Prior art keywords
data
signal
setup information
cpu
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17378A
Other languages
Japanese (ja)
Other versions
JPS6035685B2 (en
Inventor
Hiroaki Aotsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17378A priority Critical patent/JPS6035685B2/en
Publication of JPS5493931A publication Critical patent/JPS5493931A/en
Publication of JPS6035685B2 publication Critical patent/JPS6035685B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To realize a data take-in system with which the data loss can be solved in an extremely effective way.
CONSTITUTION: The sample-held input data is converted into the digital signal through A/D converter and then transmitted to multiplexer MPX to be controlled by control signal 9. And the data is distributed to memory M1 and M2 according the level of signal 9 and then sent to central process unit CPU via gate G2 and G3 and under the control of signal 8a and 8b. The data take-in time of memory M1 and M2 in CPU is decided by the data setup information which repeats "1" and "O" with period Ta. Accordingly, the previous data setup information is taken in previously to secure the exclusive logical sum (EOR) between the new and the previous data setup information when the new information is taken in. And when the result becomes "1", CPU takes in the data by deciding that the data has been set up.
COPYRIGHT: (C)1979,JPO&Japio
JP17378A 1978-01-06 1978-01-06 Data import method Expired JPS6035685B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17378A JPS6035685B2 (en) 1978-01-06 1978-01-06 Data import method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17378A JPS6035685B2 (en) 1978-01-06 1978-01-06 Data import method

Publications (2)

Publication Number Publication Date
JPS5493931A true JPS5493931A (en) 1979-07-25
JPS6035685B2 JPS6035685B2 (en) 1985-08-16

Family

ID=11466608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17378A Expired JPS6035685B2 (en) 1978-01-06 1978-01-06 Data import method

Country Status (1)

Country Link
JP (1) JPS6035685B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59186036A (en) * 1983-04-06 1984-10-22 Kubota Ltd Controlling system of analog/digital converter of electronic balance
JPS59186037A (en) * 1983-04-06 1984-10-22 Kubota Ltd Controlling system of analog/digital converter of electronic balance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59186036A (en) * 1983-04-06 1984-10-22 Kubota Ltd Controlling system of analog/digital converter of electronic balance
JPS59186037A (en) * 1983-04-06 1984-10-22 Kubota Ltd Controlling system of analog/digital converter of electronic balance

Also Published As

Publication number Publication date
JPS6035685B2 (en) 1985-08-16

Similar Documents

Publication Publication Date Title
JPS5723356A (en) Sound signal converter
JPS5493931A (en) Data take-in system
JPS54109872A (en) Pla system of electronic type multifunction watch
JPS52147287A (en) Process control equipment
JPS54146552A (en) Interruption control system
JPS5245850A (en) Data input equipment
JPS5556259A (en) Interruption circuit
JPS5537644A (en) Input-output circuit of microcomputer
JPS5532117A (en) Bus controlling device
JPS5342636A (en) Setting condition output system of data gathering equipment
JPS53138628A (en) Compressed data reproducing method using interpolation
JPS5429901A (en) Data transmission control system
JPS54161833A (en) Signal process system
JPS5498130A (en) Input/output control system
JPS5622131A (en) Data input system
JPS5478634A (en) Input/output interface
JPS5273641A (en) Line collection system for data circuit
JPS5334242A (en) Device for controlling elevator
JPS5291343A (en) Information processing apparatus
JPS5450231A (en) Encode circuit for contactless switch
JPS5416944A (en) Input/output interface control system
JPS5493939A (en) Interruption control system
JPS532048A (en) Offering control system of data transmission device
JPS5365635A (en) Data transmission system
JPS5474608A (en) Conversion method of multiplicity for digital signal processing