JPS5493362A - Plasma processing method and its processor - Google Patents

Plasma processing method and its processor

Info

Publication number
JPS5493362A
JPS5493362A JP15844377A JP15844377A JPS5493362A JP S5493362 A JPS5493362 A JP S5493362A JP 15844377 A JP15844377 A JP 15844377A JP 15844377 A JP15844377 A JP 15844377A JP S5493362 A JPS5493362 A JP S5493362A
Authority
JP
Japan
Prior art keywords
high frequency
reaction tube
pair
wafers
wafer group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15844377A
Other languages
Japanese (ja)
Other versions
JPS5616539B2 (en
Inventor
Daijiro Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15844377A priority Critical patent/JPS5493362A/en
Publication of JPS5493362A publication Critical patent/JPS5493362A/en
Publication of JPS5616539B2 publication Critical patent/JPS5616539B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make unneccessary the preliminary heating time and to make suitable for mass-production, by locating the processed semiconductor wafers in the quartz tube exhausted by opposing them each other, and applying high frequency electric field by using the wafer itself for the electrode while flowing ionized gases to produce plasma.
CONSTITUTION: The processor is consituted with the quartz reaction tube 1, resistance heating furnace 2 surrounding it, gas inlet 3, wafer group 5 placed in the reaction tube 1, and high frequency oscillator 6 feeding high frequency power to the wafer group via the power feeder 7. The wafer group 5 located in the reaction tube 1 is taken one pair with two wafers opposed each other, and 5A to 5H being a pair respectively are provided with space. Further, every other pair is connected parallelly with the feeders 7a and 7b. With this constitution, while keeping the pressure in the reaction tube 1 as 1.3 Torr., SiH4 and NH3 are fed and the temperature is kept at 350°C, applying high frequency power between the opposing wafers and producing plasma between them. Thus, Si3N4 film is produced.
COPYRIGHT: (C)1979,JPO&Japio
JP15844377A 1977-12-30 1977-12-30 Plasma processing method and its processor Granted JPS5493362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15844377A JPS5493362A (en) 1977-12-30 1977-12-30 Plasma processing method and its processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15844377A JPS5493362A (en) 1977-12-30 1977-12-30 Plasma processing method and its processor

Publications (2)

Publication Number Publication Date
JPS5493362A true JPS5493362A (en) 1979-07-24
JPS5616539B2 JPS5616539B2 (en) 1981-04-16

Family

ID=15671870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15844377A Granted JPS5493362A (en) 1977-12-30 1977-12-30 Plasma processing method and its processor

Country Status (1)

Country Link
JP (1) JPS5493362A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764922A (en) * 1980-10-07 1982-04-20 Mitsubishi Electric Corp Apparatus for forming amorphous thin film
JPS57202723A (en) * 1981-06-09 1982-12-11 Matsushita Electric Ind Co Ltd Semiconductor manufacturing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764922A (en) * 1980-10-07 1982-04-20 Mitsubishi Electric Corp Apparatus for forming amorphous thin film
JPS57202723A (en) * 1981-06-09 1982-12-11 Matsushita Electric Ind Co Ltd Semiconductor manufacturing device

Also Published As

Publication number Publication date
JPS5616539B2 (en) 1981-04-16

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