JPS5491102A - Voice reproducing device - Google Patents

Voice reproducing device

Info

Publication number
JPS5491102A
JPS5491102A JP15997777A JP15997777A JPS5491102A JP S5491102 A JPS5491102 A JP S5491102A JP 15997777 A JP15997777 A JP 15997777A JP 15997777 A JP15997777 A JP 15997777A JP S5491102 A JPS5491102 A JP S5491102A
Authority
JP
Japan
Prior art keywords
voice
memory
read
circuit
buffer memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15997777A
Other languages
Japanese (ja)
Inventor
Hiroichi Otsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15997777A priority Critical patent/JPS5491102A/en
Publication of JPS5491102A publication Critical patent/JPS5491102A/en
Pending legal-status Critical Current

Links

Landscapes

  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)

Abstract

PURPOSE: To obtain a small-size and light-weight reproducing device which can reproduce voice without breaks, by using two buffer memories in a voice accumultation memory using CCD.
CONSTITUTION: One sector of voice information is read out from voice accumulation memory 1, which is constituted by CCD, at every 125 μs, and switch circuit 2 is switched alternately at every 125 μs to transfer and accumulate read-out voice information in buffer memories 3 and 4 alternately. Switch circuits 5.1 to 5.128 are connected to one of buffer memories 3 and 4, where information is not transferred and accumulated, synchronously with the operation above and are so controlled that they may read out accumulated contents of the buffer memory. These read-out signals are arranged in serial according to the control of voice control memory 8 by AND circuit 6 and OR circuit 9 and are supplied to the output terminal, thereby reproducing voice without breaks.
COPYRIGHT: (C)1979,JPO&Japio
JP15997777A 1977-12-28 1977-12-28 Voice reproducing device Pending JPS5491102A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15997777A JPS5491102A (en) 1977-12-28 1977-12-28 Voice reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15997777A JPS5491102A (en) 1977-12-28 1977-12-28 Voice reproducing device

Publications (1)

Publication Number Publication Date
JPS5491102A true JPS5491102A (en) 1979-07-19

Family

ID=15705297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15997777A Pending JPS5491102A (en) 1977-12-28 1977-12-28 Voice reproducing device

Country Status (1)

Country Link
JP (1) JPS5491102A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013533504A (en) * 2010-06-08 2013-08-22 サムスン エレクトロニクス カンパニー リミテッド Method and system for decoding audio data with selective output control

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013533504A (en) * 2010-06-08 2013-08-22 サムスン エレクトロニクス カンパニー リミテッド Method and system for decoding audio data with selective output control

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