JPS5487159A - Exclusive logical sum circuit - Google Patents

Exclusive logical sum circuit

Info

Publication number
JPS5487159A
JPS5487159A JP15433777A JP15433777A JPS5487159A JP S5487159 A JPS5487159 A JP S5487159A JP 15433777 A JP15433777 A JP 15433777A JP 15433777 A JP15433777 A JP 15433777A JP S5487159 A JPS5487159 A JP S5487159A
Authority
JP
Japan
Prior art keywords
branch
logical
potential
conductive
sum circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15433777A
Other languages
Japanese (ja)
Inventor
Yoshiaki Michiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15433777A priority Critical patent/JPS5487159A/en
Publication of JPS5487159A publication Critical patent/JPS5487159A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors

Landscapes

  • Logic Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)

Abstract

PURPOSE:To constitute the exclusive logical sum circuit with a few elements and to make easy multi-input, by locating C-MOSFET symmetrically. CONSTITUTION:PMOSP1 to P3 and NMOSN1 to N3, PMOSP4 to P6 and NMOSN4 to N6 are symmetrically arranged between the high potential VH and branch A and between the branch A and the low potential VL. When all the inputs are logically 0, no path is made between the branch A and the potential VL, FETP1, P2,P3 are conductive, and if they are logically 1, FETN1, N2, N3 are conductive, and in any case, ligical 1 is caused to the branch A and the output OUT has the logical 0. Further, if the inputs have one different ligical value at least, no path is present between the potential VH and the branch A. One of FETP4,P5,P6 and one of FETN4,N5,N6 are conductive, and the branch A is at logical 0 and the logical 1 is outputted. Thus, desired object can be achieved. Further, by adding FETP8, the operation speed at DC level can be inproved.
JP15433777A 1977-12-23 1977-12-23 Exclusive logical sum circuit Pending JPS5487159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15433777A JPS5487159A (en) 1977-12-23 1977-12-23 Exclusive logical sum circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15433777A JPS5487159A (en) 1977-12-23 1977-12-23 Exclusive logical sum circuit

Publications (1)

Publication Number Publication Date
JPS5487159A true JPS5487159A (en) 1979-07-11

Family

ID=15581937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15433777A Pending JPS5487159A (en) 1977-12-23 1977-12-23 Exclusive logical sum circuit

Country Status (1)

Country Link
JP (1) JPS5487159A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56125854A (en) * 1980-03-10 1981-10-02 Nec Corp Integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56125854A (en) * 1980-03-10 1981-10-02 Nec Corp Integrated circuit
JPS6217876B2 (en) * 1980-03-10 1987-04-20 Nippon Electric Co

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