JPS5483340A - Logic array - Google Patents
Logic arrayInfo
- Publication number
- JPS5483340A JPS5483340A JP15130677A JP15130677A JPS5483340A JP S5483340 A JPS5483340 A JP S5483340A JP 15130677 A JP15130677 A JP 15130677A JP 15130677 A JP15130677 A JP 15130677A JP S5483340 A JPS5483340 A JP S5483340A
- Authority
- JP
- Japan
- Prior art keywords
- array
- outputs
- decoder
- logic array
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE: To simplify the circuitry of the logic array, by constructing the programmable logic array with the AND array and the decoder circuit which selects this AND array and a part of the AND terms of this AND array, and adding parallel bits of the shift register to the decoder circuit.
CONSTITUTION: The AND-term selector circuit 5, which constitutes programmable logic array PLA is provided with serially-connected filp-flops FF1 to FF7, which form the shift register, and decoder 20 to which outputs of these FF1 to FF7 are to be inputted. Then shift indicator DIA is supplied to selector circuit 5, and respective outputs B1 to B7 of FF1 to FF7 are decoded at decoder 20. Its decoded outputs a1 to a128 are inputted to AND gates A1 to A128 to which detection levels of the respective AND terms A1 to A128 are inputted, and the outputs of gates A1 to A128 are taken out as output DOA through OR gate 21.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15130677A JPS5483340A (en) | 1977-12-15 | 1977-12-15 | Logic array |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15130677A JPS5483340A (en) | 1977-12-15 | 1977-12-15 | Logic array |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5483340A true JPS5483340A (en) | 1979-07-03 |
JPS6145265B2 JPS6145265B2 (en) | 1986-10-07 |
Family
ID=15515775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15130677A Granted JPS5483340A (en) | 1977-12-15 | 1977-12-15 | Logic array |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5483340A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57203137A (en) * | 1981-06-04 | 1982-12-13 | Ibm | Logic array |
EP0379071A2 (en) * | 1989-01-19 | 1990-07-25 | National Semiconductor Corporation | Multiple page programmable logic architecture |
-
1977
- 1977-12-15 JP JP15130677A patent/JPS5483340A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57203137A (en) * | 1981-06-04 | 1982-12-13 | Ibm | Logic array |
JPH0218497B2 (en) * | 1981-06-04 | 1990-04-25 | Intaanashonaru Bijinesu Mashiinzu Corp | |
EP0379071A2 (en) * | 1989-01-19 | 1990-07-25 | National Semiconductor Corporation | Multiple page programmable logic architecture |
EP0379071A3 (en) * | 1989-01-19 | 1990-10-31 | National Semiconductor Corporation | Multiple page programmable logic architecture |
Also Published As
Publication number | Publication date |
---|---|
JPS6145265B2 (en) | 1986-10-07 |
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