JPS5470046A - Computer control system for copier - Google Patents

Computer control system for copier

Info

Publication number
JPS5470046A
JPS5470046A JP13681777A JP13681777A JPS5470046A JP S5470046 A JPS5470046 A JP S5470046A JP 13681777 A JP13681777 A JP 13681777A JP 13681777 A JP13681777 A JP 13681777A JP S5470046 A JPS5470046 A JP S5470046A
Authority
JP
Japan
Prior art keywords
register
signal
gate
output data
copier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13681777A
Other languages
Japanese (ja)
Inventor
Masao Hosaka
Yoshitaka Ogino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP13681777A priority Critical patent/JPS5470046A/en
Publication of JPS5470046A publication Critical patent/JPS5470046A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Or Security For Electrophotography (AREA)

Abstract

PURPOSE:To efficiently carry out the copy sequence control by making the combination of one device/port bit so as to make it possible to provide the set-reset at plural places. CONSTITUTION:Desired loads RR0-RR7 of the copier are coupled to register 11 which accommodates the output data via drive circuit 12, and concurrently the latch circuit 13 which selects the outside device and which couples to AND gate G1 is also coupled to the register 11 which accommodates the output data via AND gate G2. Accordingly, the output instruction from the central processing unit is decoded. In case the output instruction, WRITE signal followed by 10P signal, DEV signal and TS signal is successively issued, and AND condition of AND gate G2 is formed to trigger the register 11. Then the output data D0-D7 of accumulator are accommodated in the register 11, and the drive circuit 12 is driven, hence the loads RR0-RR7 are set or reset.
JP13681777A 1977-11-15 1977-11-15 Computer control system for copier Pending JPS5470046A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13681777A JPS5470046A (en) 1977-11-15 1977-11-15 Computer control system for copier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13681777A JPS5470046A (en) 1977-11-15 1977-11-15 Computer control system for copier

Publications (1)

Publication Number Publication Date
JPS5470046A true JPS5470046A (en) 1979-06-05

Family

ID=15184190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13681777A Pending JPS5470046A (en) 1977-11-15 1977-11-15 Computer control system for copier

Country Status (1)

Country Link
JP (1) JPS5470046A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119329A (en) * 1976-03-31 1977-10-06 Canon Inc Control of copier and the like

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52119329A (en) * 1976-03-31 1977-10-06 Canon Inc Control of copier and the like

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