JPS6410374A - Electronic memorandum - Google Patents

Electronic memorandum

Info

Publication number
JPS6410374A
JPS6410374A JP16737087A JP16737087A JPS6410374A JP S6410374 A JPS6410374 A JP S6410374A JP 16737087 A JP16737087 A JP 16737087A JP 16737087 A JP16737087 A JP 16737087A JP S6410374 A JPS6410374 A JP S6410374A
Authority
JP
Japan
Prior art keywords
data
signal
memory elements
storage
temporary storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16737087A
Other languages
Japanese (ja)
Inventor
Satoshi Yakushiji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP16737087A priority Critical patent/JPS6410374A/en
Publication of JPS6410374A publication Critical patent/JPS6410374A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To efficiently store data by adding a data temporary storage memory element erasing a storage data after a setting time elapses. CONSTITUTION:A CPU 2 controls the entire device and uses a key entry signal by the operation of an input key section 10 so as to execute signal processings such as storage of an input data to respective memory elements 5, 6, 7 according to a control program stored in a ROM, data transfer to a display section 11 and drive of an erasure signal generating circuit 4 to generate an erasure signal by using a signal from a timer circuit 3. The memory elements 5, 6 among the memory elements 5, 6, 7 are provided for long period preservation of the data and the memory element 7 connecting to the timer circuit 3 via the erasure signal generating circuit 4 is provided for temporary storage of the data.
JP16737087A 1987-07-03 1987-07-03 Electronic memorandum Pending JPS6410374A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16737087A JPS6410374A (en) 1987-07-03 1987-07-03 Electronic memorandum

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16737087A JPS6410374A (en) 1987-07-03 1987-07-03 Electronic memorandum

Publications (1)

Publication Number Publication Date
JPS6410374A true JPS6410374A (en) 1989-01-13

Family

ID=15848453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16737087A Pending JPS6410374A (en) 1987-07-03 1987-07-03 Electronic memorandum

Country Status (1)

Country Link
JP (1) JPS6410374A (en)

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