JPS5467310A - Synchronizing method and circuit for digital communication system - Google Patents

Synchronizing method and circuit for digital communication system

Info

Publication number
JPS5467310A
JPS5467310A JP13393777A JP13393777A JPS5467310A JP S5467310 A JPS5467310 A JP S5467310A JP 13393777 A JP13393777 A JP 13393777A JP 13393777 A JP13393777 A JP 13393777A JP S5467310 A JPS5467310 A JP S5467310A
Authority
JP
Japan
Prior art keywords
frame
counter
pattern
detector
super
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13393777A
Other languages
Japanese (ja)
Other versions
JPS5759697B2 (en
Inventor
Yukio Takimoto
Iwao Eguchi
Hiroaki Shioda
Yoshiro Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13393777A priority Critical patent/JPS5467310A/en
Publication of JPS5467310A publication Critical patent/JPS5467310A/en
Publication of JPS5759697B2 publication Critical patent/JPS5759697B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To attain super-frame synchronization effectively, by using frame synchronous codes of a plural number of bits centralized upon and arranged in each frame. CONSTITUTION:An input signal is supplied to pattern-A detector 2 and pattern-B detector 3, frame-synchronous circuit 4 operates so that pattern A will be detected at the time forecasted by frame counter 5, and when the operation is stabilized, frames are synchronized by counter 5. Super-frame counter 6, on the other hand, runs freely at period Tp by frame pulses from counter 5, and when detector 3 detects super-frame synchronous pattern B at the time forecasted by counter 5, a reset pulse is applied to counter 6 instantly and the operation in correct phase is carried out from the point in time.
JP13393777A 1977-11-08 1977-11-08 Synchronizing method and circuit for digital communication system Granted JPS5467310A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13393777A JPS5467310A (en) 1977-11-08 1977-11-08 Synchronizing method and circuit for digital communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13393777A JPS5467310A (en) 1977-11-08 1977-11-08 Synchronizing method and circuit for digital communication system

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP57038603A Division JPS5912059B2 (en) 1982-03-11 1982-03-11 How to synchronize digital communication methods

Publications (2)

Publication Number Publication Date
JPS5467310A true JPS5467310A (en) 1979-05-30
JPS5759697B2 JPS5759697B2 (en) 1982-12-16

Family

ID=15116545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13393777A Granted JPS5467310A (en) 1977-11-08 1977-11-08 Synchronizing method and circuit for digital communication system

Country Status (1)

Country Link
JP (1) JPS5467310A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55135450A (en) * 1979-04-10 1980-10-22 Mitsubishi Electric Corp Synchronous signal formation for digital transmission signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55135450A (en) * 1979-04-10 1980-10-22 Mitsubishi Electric Corp Synchronous signal formation for digital transmission signal

Also Published As

Publication number Publication date
JPS5759697B2 (en) 1982-12-16

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