JPS545656A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS545656A
JPS545656A JP7086177A JP7086177A JPS545656A JP S545656 A JPS545656 A JP S545656A JP 7086177 A JP7086177 A JP 7086177A JP 7086177 A JP7086177 A JP 7086177A JP S545656 A JPS545656 A JP S545656A
Authority
JP
Japan
Prior art keywords
base part
manufacture
cut
semiconductor device
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7086177A
Other languages
Japanese (ja)
Other versions
JPS5813030B2 (en
Inventor
Yoshiaki Sano
Hiroshi Mugitani
Muneyasu Tomiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7086177A priority Critical patent/JPS5813030B2/en
Publication of JPS545656A publication Critical patent/JPS545656A/en
Publication of JPS5813030B2 publication Critical patent/JPS5813030B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To avoid occurrence of intertwing of the lead wires when the base frame connected to the base part is cut off, by using a cutter blade featuring the blade width which is larger than the lead base part space and smaller than the lead wire space of the adjacent external leads and containing a slope part to cut off the base part obliquely.
JP7086177A 1977-06-15 1977-06-15 Manufacturing method of semiconductor device Expired JPS5813030B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7086177A JPS5813030B2 (en) 1977-06-15 1977-06-15 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7086177A JPS5813030B2 (en) 1977-06-15 1977-06-15 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS545656A true JPS545656A (en) 1979-01-17
JPS5813030B2 JPS5813030B2 (en) 1983-03-11

Family

ID=13443756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7086177A Expired JPS5813030B2 (en) 1977-06-15 1977-06-15 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5813030B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6255722B1 (en) * 1998-06-11 2001-07-03 International Rectifier Corp. High current capacity semiconductor device housing

Also Published As

Publication number Publication date
JPS5813030B2 (en) 1983-03-11

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