JPS5449006A - Time-division switching system - Google Patents

Time-division switching system

Info

Publication number
JPS5449006A
JPS5449006A JP11508477A JP11508477A JPS5449006A JP S5449006 A JPS5449006 A JP S5449006A JP 11508477 A JP11508477 A JP 11508477A JP 11508477 A JP11508477 A JP 11508477A JP S5449006 A JPS5449006 A JP S5449006A
Authority
JP
Japan
Prior art keywords
circuit
swg
signals
signal
swm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11508477A
Other languages
Japanese (ja)
Other versions
JPS5651556B2 (en
Inventor
Takehiro Hara
Hideyuki Matsubara
Haruhiko Uchiyama
Kenzo Inuzuka
Takeshi Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK, Oki Electric Industry Co Ltd filed Critical Kokusai Denshin Denwa KK
Priority to JP11508477A priority Critical patent/JPS5449006A/en
Publication of JPS5449006A publication Critical patent/JPS5449006A/en
Publication of JPS5651556B2 publication Critical patent/JPS5651556B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To simplify the connection control between circuit-signal concentrating- expansion parts and a circuit signal bread-down-makeup device by controlling connections among those devices by one switching memory, by providing a switching gate circuit among them. CONSTITUTION:This system is provided with a plural number of circuit signal concentrator-expanders A0, A1, and A2 which concentrate and expand signals from a plural number of circuit groups G0, G1 and G2 through respective circuits, and switching gate circuit SWG, which is arranged among devices A0, A1 and A2, controlling transfer signals. Further, circuit-signal breakdown-makeup device SSR, which changes signals from circuits or signals from the switching unit to respective circuits into the information states of corresponding destinations, is connected to circuit SWG. Next, switching memory units SWM and CPU are connected between device SSR and circuit SWG; device SWM is stored with information for circuit connection setting, and the CPU makes the administration and control of device SWM, so that the connections between devices A0, A1 and A2, and circuit SWG will be controlled in a time-division mode.
JP11508477A 1977-09-27 1977-09-27 Time-division switching system Granted JPS5449006A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11508477A JPS5449006A (en) 1977-09-27 1977-09-27 Time-division switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11508477A JPS5449006A (en) 1977-09-27 1977-09-27 Time-division switching system

Publications (2)

Publication Number Publication Date
JPS5449006A true JPS5449006A (en) 1979-04-18
JPS5651556B2 JPS5651556B2 (en) 1981-12-05

Family

ID=14653785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11508477A Granted JPS5449006A (en) 1977-09-27 1977-09-27 Time-division switching system

Country Status (1)

Country Link
JP (1) JPS5449006A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156953U (en) * 1985-03-22 1986-09-29

Also Published As

Publication number Publication date
JPS5651556B2 (en) 1981-12-05

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