JPS5447424A - Picture memory unit - Google Patents

Picture memory unit

Info

Publication number
JPS5447424A
JPS5447424A JP11385977A JP11385977A JPS5447424A JP S5447424 A JPS5447424 A JP S5447424A JP 11385977 A JP11385977 A JP 11385977A JP 11385977 A JP11385977 A JP 11385977A JP S5447424 A JPS5447424 A JP S5447424A
Authority
JP
Japan
Prior art keywords
signal
period
circuit
picture element
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11385977A
Other languages
Japanese (ja)
Inventor
Hisaharu Takeuchi
Akira Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11385977A priority Critical patent/JPS5447424A/en
Publication of JPS5447424A publication Critical patent/JPS5447424A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To ensure the picture renewal in a short time as well as an independent action at the CPU side to be applied widely to the TV game and the like, by performing the writing of the picture element signals via an effective use of the remainnig periods excluding the priority period.
CONSTITUTION: The write request signal sent from CPU12 is detected through circuit 19, and the remaining periods excluding the signal reading period which is determined in preference in picture memory 16 through circuit 19. And during this period, write signal W is delivered to the write request. After this, multiplexer 15 reads out the address information of ratch circuit 20 via signal W to designate the address of memory 16, and the picture element signals of ratch circuit 21 are written in parallel into the address designated. Thus, the picture element signal transmitted from CPU12 can be written in an extremely effective way in the periods excluding the reading period in the reading cycle of the picture element signal in one address without waiting for the vertical blanking period
COPYRIGHT: (C)1979,JPO&Japio
JP11385977A 1977-09-21 1977-09-21 Picture memory unit Pending JPS5447424A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11385977A JPS5447424A (en) 1977-09-21 1977-09-21 Picture memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11385977A JPS5447424A (en) 1977-09-21 1977-09-21 Picture memory unit

Publications (1)

Publication Number Publication Date
JPS5447424A true JPS5447424A (en) 1979-04-14

Family

ID=14622860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11385977A Pending JPS5447424A (en) 1977-09-21 1977-09-21 Picture memory unit

Country Status (1)

Country Link
JP (1) JPS5447424A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57154286A (en) * 1981-03-17 1982-09-24 Omron Tateisi Electronics Co Display data renewal controller for scanning display
JPS5811992A (en) * 1981-07-15 1983-01-22 松下電工株式会社 Image display unit
JPS5895394A (en) * 1981-11-30 1983-06-06 株式会社東芝 Matrix type liquid crystal display
JPS60107693A (en) * 1983-11-17 1985-06-13 株式会社山武 Control of display memory
JPS6252591A (en) * 1985-08-31 1987-03-07 日本電気ホームエレクトロニクス株式会社 Access control system for screen memory
JPS6287390U (en) * 1986-10-15 1987-06-04
JPH03129391A (en) * 1990-06-15 1991-06-03 Hitachi Ltd Access method for refresh memory, display controller and graphic processor
JPH0535232A (en) * 1991-11-25 1993-02-12 Sony Corp Memory control circuit
JPH07225573A (en) * 1995-01-26 1995-08-22 Hitachi Ltd Method of accessing refresh memory, display controller and graphic processor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157137A (en) * 1974-11-13 1976-05-19 Matsushita Electric Ind Co Ltd INKYOKUSENKANDEISUPUREISOCHI
JPS5282134A (en) * 1975-12-29 1977-07-09 Hitachi Ltd Data display control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157137A (en) * 1974-11-13 1976-05-19 Matsushita Electric Ind Co Ltd INKYOKUSENKANDEISUPUREISOCHI
JPS5282134A (en) * 1975-12-29 1977-07-09 Hitachi Ltd Data display control system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57154286A (en) * 1981-03-17 1982-09-24 Omron Tateisi Electronics Co Display data renewal controller for scanning display
JPS5811992A (en) * 1981-07-15 1983-01-22 松下電工株式会社 Image display unit
JPS5895394A (en) * 1981-11-30 1983-06-06 株式会社東芝 Matrix type liquid crystal display
JPS60107693A (en) * 1983-11-17 1985-06-13 株式会社山武 Control of display memory
JPS6252591A (en) * 1985-08-31 1987-03-07 日本電気ホームエレクトロニクス株式会社 Access control system for screen memory
JPS6287390U (en) * 1986-10-15 1987-06-04
JPH03129391A (en) * 1990-06-15 1991-06-03 Hitachi Ltd Access method for refresh memory, display controller and graphic processor
JPH0535232A (en) * 1991-11-25 1993-02-12 Sony Corp Memory control circuit
JPH07225573A (en) * 1995-01-26 1995-08-22 Hitachi Ltd Method of accessing refresh memory, display controller and graphic processor

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