JPS54133850A - Input-output controller - Google Patents

Input-output controller

Info

Publication number
JPS54133850A
JPS54133850A JP4080478A JP4080478A JPS54133850A JP S54133850 A JPS54133850 A JP S54133850A JP 4080478 A JP4080478 A JP 4080478A JP 4080478 A JP4080478 A JP 4080478A JP S54133850 A JPS54133850 A JP S54133850A
Authority
JP
Japan
Prior art keywords
common bus
internal
function element
access
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4080478A
Other languages
Japanese (ja)
Inventor
Takashi Ishikawa
Akira Onodera
Saneyuki Hiwatari
Hisayoshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4080478A priority Critical patent/JPS54133850A/en
Publication of JPS54133850A publication Critical patent/JPS54133850A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable an input-output controller connected to a central processor via a common bus to have an internal common bus of the mono-bus constitution independent of the common bus, and also to transfer data via its internal common bus by each function element.
CONSTITUTION: Internal common bus 11 of communication controller 10 is connected to common bus 23 via a gate, etc. When an instruction is transmitted from central processor 24, internal control part 19 discriminates its address and whether access to communicaton controller 10 is required or not, judging from control information. When the access is required, internal control part 19 discriminates in detail what function element such as internal registers 12 to 17 and circuit control memory 18 is the object of the access, thereby controlling the ON-OFF operation of the corresponding gate. To each function element, an address inside of the system area of main memory unit 25 is assigned and data are transferred directly to each function element from processor 24.
COPYRIGHT: (C)1979,JPO&Japio
JP4080478A 1978-04-08 1978-04-08 Input-output controller Pending JPS54133850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4080478A JPS54133850A (en) 1978-04-08 1978-04-08 Input-output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4080478A JPS54133850A (en) 1978-04-08 1978-04-08 Input-output controller

Publications (1)

Publication Number Publication Date
JPS54133850A true JPS54133850A (en) 1979-10-17

Family

ID=12590816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4080478A Pending JPS54133850A (en) 1978-04-08 1978-04-08 Input-output controller

Country Status (1)

Country Link
JP (1) JPS54133850A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4931166A (en) * 1972-07-19 1974-03-20
JPS5087544A (en) * 1973-12-06 1975-07-14
JPS50147633A (en) * 1974-05-17 1975-11-26
JPS5115336A (en) * 1974-07-29 1976-02-06 Yokogawa Electric Works Ltd
JPS5485646A (en) * 1977-12-20 1979-07-07 Omron Tateisi Electronics Co Data transfer method between input and output units via microprocessor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4931166A (en) * 1972-07-19 1974-03-20
JPS5087544A (en) * 1973-12-06 1975-07-14
JPS50147633A (en) * 1974-05-17 1975-11-26
JPS5115336A (en) * 1974-07-29 1976-02-06 Yokogawa Electric Works Ltd
JPS5485646A (en) * 1977-12-20 1979-07-07 Omron Tateisi Electronics Co Data transfer method between input and output units via microprocessor

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