JPS54133039A - Check system for 2 out of n signal - Google Patents
Check system for 2 out of n signalInfo
- Publication number
- JPS54133039A JPS54133039A JP4039878A JP4039878A JPS54133039A JP S54133039 A JPS54133039 A JP S54133039A JP 4039878 A JP4039878 A JP 4039878A JP 4039878 A JP4039878 A JP 4039878A JP S54133039 A JPS54133039 A JP S54133039A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- check
- code
- constitution
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Monitoring And Testing Of Exchanges (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE: To economize the check system, by grouping the input leads to perform checking.
CONSTITUTION: When incoming signals are A,B and C code, AO to A7,BO to B7 and CO to C7 are taken as the input to each code. The exclusive logical sum elements 10 to 13,20 to 23, and 30 to 33 check individual code, and output the error signal E when either of the check circuits a,b,c is 1. With this constitution, as to the code A, the inspection objective of signal is grouped into two groups of AO,A1,A2 and A4,A7. As to the code A, constitution is made that all are treated as error other than one signal to A0,A1,A2 and one signal A4,A7 (a), two signals at A0,A1,A2 (b), and signal for the both A4 and A7 (c). Further, the similar check is made for the codes B and C, and as the result of check for either of the codes, if the output of individual check circuit is 1, the error signal E is outputted.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4039878A JPS54133039A (en) | 1978-04-07 | 1978-04-07 | Check system for 2 out of n signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4039878A JPS54133039A (en) | 1978-04-07 | 1978-04-07 | Check system for 2 out of n signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS54133039A true JPS54133039A (en) | 1979-10-16 |
Family
ID=12579553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4039878A Pending JPS54133039A (en) | 1978-04-07 | 1978-04-07 | Check system for 2 out of n signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54133039A (en) |
-
1978
- 1978-04-07 JP JP4039878A patent/JPS54133039A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS53114680A (en) | Integrated circuit | |
| JPS54133039A (en) | Check system for 2 out of n signal | |
| JPS5246749A (en) | Noise eliminator | |
| JPS5228944A (en) | Cholagogue | |
| JPS5232645A (en) | Multiplexer | |
| JPS57202153A (en) | Pattern detecting circuit | |
| JPS5731058A (en) | Fault diagnostic system of digital circuit | |
| JPS5549759A (en) | Signal processing system | |
| JPS53141448A (en) | Logical operation circuit | |
| JPS545339A (en) | Digital input circuit | |
| JPS56129451A (en) | Communication controller | |
| JPS55146540A (en) | Malfunction preventive device of keyboard | |
| JPS5275236A (en) | Signal processing circuit | |
| JPS5357704A (en) | Code detection circuit | |
| JPS53121439A (en) | Interrupt processor | |
| JPS5534741A (en) | Micro computer input circuit | |
| JPS53121543A (en) | Check circuit | |
| JPS57206961A (en) | Logical integrated circuit | |
| JPS544556A (en) | Counter type encoder | |
| JPS5265634A (en) | Binary code transducer | |
| JPS5311529A (en) | Code processing system | |
| JPS53119644A (en) | Parity check system | |
| JPS5330256A (en) | Digital filter circuit | |
| JPS5565164A (en) | Decoder check circuit | |
| JPS57150278A (en) | Picture signal encoding device |