JPS54121064A - Automatic surge rating measuring device - Google Patents

Automatic surge rating measuring device

Info

Publication number
JPS54121064A
JPS54121064A JP2778378A JP2778378A JPS54121064A JP S54121064 A JPS54121064 A JP S54121064A JP 2778378 A JP2778378 A JP 2778378A JP 2778378 A JP2778378 A JP 2778378A JP S54121064 A JPS54121064 A JP S54121064A
Authority
JP
Japan
Prior art keywords
voltage
memorization
output
terminal
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2778378A
Other languages
Japanese (ja)
Other versions
JPS6117302B2 (en
Inventor
Satoru Todoroki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2778378A priority Critical patent/JPS54121064A/en
Publication of JPS54121064A publication Critical patent/JPS54121064A/en
Publication of JPS6117302B2 publication Critical patent/JPS6117302B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To secure an automatic measurement for the surge rating with no destruction by giving the common connection to one of the terminal pairs of the measured objects arranged into a square and switching the other side in sequence.
CONSTITUTION: Control signal 10 is applied to terminal pair switching part 2 and then set to the terminal pair of the sample at square arrangement part 1. At the same time, preset current I0, I1... are applied in sequence from current setting part 3 to measure (4) corresponding voltage V0, V1 and so on. The output of measurement part 4 is compared (5) with the refirence voltage. In case the output is more than the reference voltage, the A/D conversion is given to the voltage and the current value at different conversion parts 6 to be memorized temporarily (7). At the same time, operation 8 and then memorization 7 are given to voltage limit exponent and surge rating N for printing 9 in correspoundence with the preceding memorization. When the readings 4 is under the reference value, comparision output 5 is supplied to control part 10. Then signal 10 reads out memorization 7 via operation part 8 to calculate the average value and the reference deviation of α and N for printing 9. The terminal of sample 11 is connected to switching part 14 and 15 with every matrix, and part 15 has one turn by signal 10 to generate the clock pulse and then to actuate part 14.
COPYRIGHT: (C)1979,JPO&Japio
JP2778378A 1978-03-13 1978-03-13 Automatic surge rating measuring device Granted JPS54121064A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2778378A JPS54121064A (en) 1978-03-13 1978-03-13 Automatic surge rating measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2778378A JPS54121064A (en) 1978-03-13 1978-03-13 Automatic surge rating measuring device

Publications (2)

Publication Number Publication Date
JPS54121064A true JPS54121064A (en) 1979-09-19
JPS6117302B2 JPS6117302B2 (en) 1986-05-07

Family

ID=12230564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2778378A Granted JPS54121064A (en) 1978-03-13 1978-03-13 Automatic surge rating measuring device

Country Status (1)

Country Link
JP (1) JPS54121064A (en)

Also Published As

Publication number Publication date
JPS6117302B2 (en) 1986-05-07

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