JPS54104743A - Failure detection system for magnetic memory unit - Google Patents

Failure detection system for magnetic memory unit

Info

Publication number
JPS54104743A
JPS54104743A JP1112178A JP1112178A JPS54104743A JP S54104743 A JPS54104743 A JP S54104743A JP 1112178 A JP1112178 A JP 1112178A JP 1112178 A JP1112178 A JP 1112178A JP S54104743 A JPS54104743 A JP S54104743A
Authority
JP
Japan
Prior art keywords
magnetic memory
memory unit
data
cpu
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1112178A
Other languages
Japanese (ja)
Inventor
Masatoshi Odahashi
Masaji Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1112178A priority Critical patent/JPS54104743A/en
Publication of JPS54104743A publication Critical patent/JPS54104743A/en
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To detect failure earlier, by adding the timing control circuit with slight circuit constitution, reducing useless operation time, executing readout again after data write-in and performing collation check.
CONSTITUTION: In the failure detection system of the magnetic memory unit 11 used for the bulk memory of a digital computer, according to the instruction of the normal or test mode from CPU 25, the data delivered from CPU 25 is memorized on the magnetic memory media 17 according to the normal data arrangement in case of the normal mode, and it is arranged on the magnetic memory unit 17 according to the test data memory arrangement in case of the test mode. This magnetic memory unit 11 is provided with the timing control circuit 18 connected to the peripheral circuits 21 and 22 delivering the normal and test mode timing from CPU 25 to the magnetic memory unit 11, other than the WRITE system control circuit 14 and the READ system control circuit 12, and only the data in test data memory arrangement is delivered to CPU 25 with the test mode.
COPYRIGHT: (C)1979,JPO&Japio
JP1112178A 1978-02-03 1978-02-03 Failure detection system for magnetic memory unit Pending JPS54104743A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1112178A JPS54104743A (en) 1978-02-03 1978-02-03 Failure detection system for magnetic memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1112178A JPS54104743A (en) 1978-02-03 1978-02-03 Failure detection system for magnetic memory unit

Publications (1)

Publication Number Publication Date
JPS54104743A true JPS54104743A (en) 1979-08-17

Family

ID=11769171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1112178A Pending JPS54104743A (en) 1978-02-03 1978-02-03 Failure detection system for magnetic memory unit

Country Status (1)

Country Link
JP (1) JPS54104743A (en)

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