JPS54104721A - Automatic rejection unit of fm multi-path distortion - Google Patents

Automatic rejection unit of fm multi-path distortion

Info

Publication number
JPS54104721A
JPS54104721A JP1120678A JP1120678A JPS54104721A JP S54104721 A JPS54104721 A JP S54104721A JP 1120678 A JP1120678 A JP 1120678A JP 1120678 A JP1120678 A JP 1120678A JP S54104721 A JPS54104721 A JP S54104721A
Authority
JP
Japan
Prior art keywords
signal
amplitude
adjuster
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1120678A
Other languages
Japanese (ja)
Inventor
Kenichi Torii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1120678A priority Critical patent/JPS54104721A/en
Publication of JPS54104721A publication Critical patent/JPS54104721A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To enable to reject the FM multi-path distortion with a simple circuit configuration, by respectively adjusting the delay amount of delay circuit and the set amplitude value of the amplitude adjuster with the feedback adjusting circuit. CONSTITUTION:The mixer 4 synthesizes FM input and the local oscillation signal, this low conversion output signal is divided 21 for the frequency, it is delayed 6 and the delayed signal is multiplied 22 to original frequency. Further, the amplitude of this signal is limited with the amplitude adjuster 7 and the interference component is rejected by adding this output to the output of the mixer 4 with the synthesizer 8. In this case, the feedback adjusting circuit consisting of the interference detection section and the erase control section respectively sets the delay amount of the delay circuit 6 and the set amplitude value of the adjuster 7. Thus, the FM multi-path pulse distortion can be rejected with a simple circuit configuration.
JP1120678A 1978-02-03 1978-02-03 Automatic rejection unit of fm multi-path distortion Pending JPS54104721A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1120678A JPS54104721A (en) 1978-02-03 1978-02-03 Automatic rejection unit of fm multi-path distortion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1120678A JPS54104721A (en) 1978-02-03 1978-02-03 Automatic rejection unit of fm multi-path distortion

Publications (1)

Publication Number Publication Date
JPS54104721A true JPS54104721A (en) 1979-08-17

Family

ID=11771530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1120678A Pending JPS54104721A (en) 1978-02-03 1978-02-03 Automatic rejection unit of fm multi-path distortion

Country Status (1)

Country Link
JP (1) JPS54104721A (en)

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