JPS54104202A - Channel selector - Google Patents

Channel selector

Info

Publication number
JPS54104202A
JPS54104202A JP1075478A JP1075478A JPS54104202A JP S54104202 A JPS54104202 A JP S54104202A JP 1075478 A JP1075478 A JP 1075478A JP 1075478 A JP1075478 A JP 1075478A JP S54104202 A JPS54104202 A JP S54104202A
Authority
JP
Japan
Prior art keywords
tuner
memory
channel
received
channel selector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1075478A
Other languages
Japanese (ja)
Other versions
JPS601773B2 (en
Inventor
Tadao Sasaki
Masaru Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP1075478A priority Critical patent/JPS601773B2/en
Publication of JPS54104202A publication Critical patent/JPS54104202A/en
Publication of JPS601773B2 publication Critical patent/JPS601773B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE: To change freely a reception channel by the 1st tuner while a program on a different channel is being received by the 2nd tuner, by supplying digital signals from the 1st memory to the 1st and 2nd tuners after D/A conversion.
CONSTITUTION: Addressing is made by voltage control type tuners 2 and 17 and channel selector 3, and a digital signal equivalent to the tuning voltage of tuner 2 is stored in each address of memory 5. Memory 18 is provided, whose capacity is as large as one address of memory 5. After addressing by channel selector 3, a digital signal from memory 5 is D/A-converted 6 and then supplied to tuner 2, and that from memory 5 is D/A-converted 22 and then supplied to tuner 17. Consequently, a program on a different channel is received by tuner 17 and in this state, a received channel by tuner 2 can be changed freely.
COPYRIGHT: (C)1979,JPO&Japio
JP1075478A 1978-02-02 1978-02-02 Channel selection device Expired JPS601773B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1075478A JPS601773B2 (en) 1978-02-02 1978-02-02 Channel selection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1075478A JPS601773B2 (en) 1978-02-02 1978-02-02 Channel selection device

Publications (2)

Publication Number Publication Date
JPS54104202A true JPS54104202A (en) 1979-08-16
JPS601773B2 JPS601773B2 (en) 1985-01-17

Family

ID=11759098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1075478A Expired JPS601773B2 (en) 1978-02-02 1978-02-02 Channel selection device

Country Status (1)

Country Link
JP (1) JPS601773B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888819A (en) * 1987-05-28 1989-12-19 Sony Corporation Television on channel selecting apparatus with sequential selection of auxiliary signal source

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888819A (en) * 1987-05-28 1989-12-19 Sony Corporation Television on channel selecting apparatus with sequential selection of auxiliary signal source

Also Published As

Publication number Publication date
JPS601773B2 (en) 1985-01-17

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