JPS5393736A - Refresh control system - Google Patents
Refresh control systemInfo
- Publication number
- JPS5393736A JPS5393736A JP854477A JP854477A JPS5393736A JP S5393736 A JPS5393736 A JP S5393736A JP 854477 A JP854477 A JP 854477A JP 854477 A JP854477 A JP 854477A JP S5393736 A JPS5393736 A JP S5393736A
- Authority
- JP
- Japan
- Prior art keywords
- refresh
- control system
- refresh control
- test
- refresh signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To ensure performance of a refresh test without breaking the test program, by controlling the refresh signal transfer to each module using the refresh signal and the output of the register to which the refresh stoppage or execution is set freely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP854477A JPS5393736A (en) | 1977-01-27 | 1977-01-27 | Refresh control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP854477A JPS5393736A (en) | 1977-01-27 | 1977-01-27 | Refresh control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5393736A true JPS5393736A (en) | 1978-08-17 |
Family
ID=11696074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP854477A Pending JPS5393736A (en) | 1977-01-27 | 1977-01-27 | Refresh control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5393736A (en) |
-
1977
- 1977-01-27 JP JP854477A patent/JPS5393736A/en active Pending
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