JPS5333005A - Time-series signal receiving control system - Google Patents

Time-series signal receiving control system

Info

Publication number
JPS5333005A
JPS5333005A JP10748576A JP10748576A JPS5333005A JP S5333005 A JPS5333005 A JP S5333005A JP 10748576 A JP10748576 A JP 10748576A JP 10748576 A JP10748576 A JP 10748576A JP S5333005 A JPS5333005 A JP S5333005A
Authority
JP
Japan
Prior art keywords
time
control system
signal receiving
receiving control
series signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10748576A
Other languages
Japanese (ja)
Other versions
JPS5535026B2 (en
Inventor
Yoshimasa Kaneko
Masanobu Ohata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10748576A priority Critical patent/JPS5333005A/en
Publication of JPS5333005A publication Critical patent/JPS5333005A/en
Publication of JPS5535026B2 publication Critical patent/JPS5535026B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:The beginning of time-series data is controlled by a gate alternation system, and the ending by a shift register system to make the interval of the time series-data short, thereby realizing the high-speed control.
JP10748576A 1976-09-08 1976-09-08 Time-series signal receiving control system Granted JPS5333005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10748576A JPS5333005A (en) 1976-09-08 1976-09-08 Time-series signal receiving control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10748576A JPS5333005A (en) 1976-09-08 1976-09-08 Time-series signal receiving control system

Publications (2)

Publication Number Publication Date
JPS5333005A true JPS5333005A (en) 1978-03-28
JPS5535026B2 JPS5535026B2 (en) 1980-09-11

Family

ID=14460401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10748576A Granted JPS5333005A (en) 1976-09-08 1976-09-08 Time-series signal receiving control system

Country Status (1)

Country Link
JP (1) JPS5333005A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165841U (en) * 1979-05-16 1980-11-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165841U (en) * 1979-05-16 1980-11-28

Also Published As

Publication number Publication date
JPS5535026B2 (en) 1980-09-11

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