JPS5378185A - Integrated circuit logical element - Google Patents

Integrated circuit logical element

Info

Publication number
JPS5378185A
JPS5378185A JP15469176A JP15469176A JPS5378185A JP S5378185 A JPS5378185 A JP S5378185A JP 15469176 A JP15469176 A JP 15469176A JP 15469176 A JP15469176 A JP 15469176A JP S5378185 A JPS5378185 A JP S5378185A
Authority
JP
Japan
Prior art keywords
integrated circuit
logical element
circuit logical
dots
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15469176A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5730309B2 (cs
Inventor
Katsuyuki Hamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15469176A priority Critical patent/JPS5378185A/ja
Publication of JPS5378185A publication Critical patent/JPS5378185A/ja
Publication of JPS5730309B2 publication Critical patent/JPS5730309B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP15469176A 1976-12-22 1976-12-22 Integrated circuit logical element Granted JPS5378185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15469176A JPS5378185A (en) 1976-12-22 1976-12-22 Integrated circuit logical element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15469176A JPS5378185A (en) 1976-12-22 1976-12-22 Integrated circuit logical element

Publications (2)

Publication Number Publication Date
JPS5378185A true JPS5378185A (en) 1978-07-11
JPS5730309B2 JPS5730309B2 (cs) 1982-06-28

Family

ID=15589817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15469176A Granted JPS5378185A (en) 1976-12-22 1976-12-22 Integrated circuit logical element

Country Status (1)

Country Link
JP (1) JPS5378185A (cs)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55107335A (en) * 1979-02-09 1980-08-18 Toshiba Corp Semiconductor integrated circuit
JPS59145542A (ja) * 1983-02-09 1984-08-21 Matsushita Electronics Corp 大規模集積回路
US4731643A (en) * 1985-10-21 1988-03-15 International Business Machines Corporation Logic-circuit layout for large-scale integrated circuits
US4746966A (en) * 1985-10-21 1988-05-24 International Business Machines Corporation Logic-circuit layout for large-scale integrated circuits

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58104306U (ja) * 1982-01-11 1983-07-15 富士バルブ株式会社 内燃機関用油圧アジヤスタ

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55107335A (en) * 1979-02-09 1980-08-18 Toshiba Corp Semiconductor integrated circuit
JPS59145542A (ja) * 1983-02-09 1984-08-21 Matsushita Electronics Corp 大規模集積回路
US4731643A (en) * 1985-10-21 1988-03-15 International Business Machines Corporation Logic-circuit layout for large-scale integrated circuits
US4746966A (en) * 1985-10-21 1988-05-24 International Business Machines Corporation Logic-circuit layout for large-scale integrated circuits

Also Published As

Publication number Publication date
JPS5730309B2 (cs) 1982-06-28

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees