JPS5364484A - Formation method of logic circuit - Google Patents

Formation method of logic circuit

Info

Publication number
JPS5364484A
JPS5364484A JP14045176A JP14045176A JPS5364484A JP S5364484 A JPS5364484 A JP S5364484A JP 14045176 A JP14045176 A JP 14045176A JP 14045176 A JP14045176 A JP 14045176A JP S5364484 A JPS5364484 A JP S5364484A
Authority
JP
Japan
Prior art keywords
logic circuit
formation method
pla
patterning
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14045176A
Other languages
Japanese (ja)
Inventor
Akira Tabata
Chuichi Takada
Toshihiko Ono
Yorihiro Uchiyama
Makoto Serigano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14045176A priority Critical patent/JPS5364484A/en
Publication of JPS5364484A publication Critical patent/JPS5364484A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform circuit formation rapidly, simply and accurately by plating a metal film for wiring connection of logic circuits using PLA and performing its patterning with a lift-off method.
COPYRIGHT: (C)1978,JPO&Japio
JP14045176A 1976-11-22 1976-11-22 Formation method of logic circuit Pending JPS5364484A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14045176A JPS5364484A (en) 1976-11-22 1976-11-22 Formation method of logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14045176A JPS5364484A (en) 1976-11-22 1976-11-22 Formation method of logic circuit

Publications (1)

Publication Number Publication Date
JPS5364484A true JPS5364484A (en) 1978-06-08

Family

ID=15268916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14045176A Pending JPS5364484A (en) 1976-11-22 1976-11-22 Formation method of logic circuit

Country Status (1)

Country Link
JP (1) JPS5364484A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4706167A (en) * 1983-11-10 1987-11-10 Telemark Co., Inc. Circuit wiring disposed on solder mask coating
JPH0210855A (en) * 1988-04-08 1990-01-16 General Electric Co (Ge) Method of automated selective interconnection of parallel devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4706167A (en) * 1983-11-10 1987-11-10 Telemark Co., Inc. Circuit wiring disposed on solder mask coating
JPH0210855A (en) * 1988-04-08 1990-01-16 General Electric Co (Ge) Method of automated selective interconnection of parallel devices

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