JPS5330873U - - Google Patents
Info
- Publication number
- JPS5330873U JPS5330873U JP1976113137U JP11313776U JPS5330873U JP S5330873 U JPS5330873 U JP S5330873U JP 1976113137 U JP1976113137 U JP 1976113137U JP 11313776 U JP11313776 U JP 11313776U JP S5330873 U JPS5330873 U JP S5330873U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/701—Tape-automated bond [TAB] connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
Landscapes
- Wire Bonding (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1976113137U JPS575887Y2 (en:Method) | 1976-08-23 | 1976-08-23 | |
| US06/039,820 US4536786A (en) | 1976-08-23 | 1979-05-17 | Lead electrode connection in a semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1976113137U JPS575887Y2 (en:Method) | 1976-08-23 | 1976-08-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5330873U true JPS5330873U (en:Method) | 1978-03-16 |
| JPS575887Y2 JPS575887Y2 (en:Method) | 1982-02-03 |
Family
ID=14604485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1976113137U Expired JPS575887Y2 (en:Method) | 1976-08-23 | 1976-08-23 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4536786A (en:Method) |
| JP (1) | JPS575887Y2 (en:Method) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5619632A (en) * | 1979-07-26 | 1981-02-24 | Seiko Epson Corp | Lead terminal |
| JPS6142842U (ja) * | 1985-07-31 | 1986-03-19 | シャープ株式会社 | 半導体装置の位置合せ装置 |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4795077A (en) * | 1988-05-23 | 1989-01-03 | Motorola Inc. | Bonding method and apparatus |
| US4948030A (en) * | 1989-01-30 | 1990-08-14 | Motorola, Inc. | Bond connection for components |
| EP0472435B1 (en) * | 1990-08-22 | 1995-11-02 | Nec Corporation | Carrier for film carrier type semiconductor device |
| JPH04307943A (ja) * | 1991-04-05 | 1992-10-30 | Mitsubishi Electric Corp | 半導体装置 |
| US5907187A (en) * | 1994-07-18 | 1999-05-25 | Kabushiki Kaisha Toshiba | Electronic component and electronic component connecting structure |
| US12021048B2 (en) * | 2021-08-30 | 2024-06-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3374537A (en) * | 1965-03-22 | 1968-03-26 | Philco Ford Corp | Method of connecting leads to a semiconductive device |
| US3450965A (en) * | 1966-05-28 | 1969-06-17 | Sony Corp | Semiconductor having reinforced lead structure |
| US3871015A (en) * | 1969-08-14 | 1975-03-11 | Ibm | Flip chip module with non-uniform connector joints |
| US3871014A (en) * | 1969-08-14 | 1975-03-11 | Ibm | Flip chip module with non-uniform solder wettable areas on the substrate |
| BE755950A (fr) * | 1969-09-11 | 1971-03-09 | Philips Nv | Procede permettant d'etablir des liaisons electriques entre desemplacements de contact d'un corps semiconducteur et des conducteurs d'alimentation |
| GB1363431A (en) * | 1970-11-24 | 1974-08-14 | Lucas Industries Ltd | Method of electrically connecting a semiconductor chip to a sub strate |
| US3724068A (en) * | 1971-02-25 | 1973-04-03 | Du Pont | Semiconductor chip packaging apparatus and method |
| US3689803A (en) * | 1971-03-30 | 1972-09-05 | Ibm | Integrated circuit structure having a unique surface metallization layout |
| FR2299724A1 (fr) * | 1975-01-29 | 1976-08-27 | Honeywell Bull Soc Ind | Perfectionnements aux supports de conditionnement de micro-plaquettes de circuits integres |
| US4010488A (en) * | 1975-11-21 | 1977-03-01 | Western Electric Company, Inc. | Electronic apparatus with optional coupling |
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1976
- 1976-08-23 JP JP1976113137U patent/JPS575887Y2/ja not_active Expired
-
1979
- 1979-05-17 US US06/039,820 patent/US4536786A/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5619632A (en) * | 1979-07-26 | 1981-02-24 | Seiko Epson Corp | Lead terminal |
| JPS6142842U (ja) * | 1985-07-31 | 1986-03-19 | シャープ株式会社 | 半導体装置の位置合せ装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US4536786A (en) | 1985-08-20 |
| JPS575887Y2 (en:Method) | 1982-02-03 |