JPS5329555B2 - - Google Patents
Info
- Publication number
- JPS5329555B2 JPS5329555B2 JP13365874A JP13365874A JPS5329555B2 JP S5329555 B2 JPS5329555 B2 JP S5329555B2 JP 13365874 A JP13365874 A JP 13365874A JP 13365874 A JP13365874 A JP 13365874A JP S5329555 B2 JPS5329555 B2 JP S5329555B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H10W10/13—
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- H10P14/61—
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- H10P95/00—
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- H10W10/0125—
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- H10W15/00—
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- H10W15/01—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/025—Deposition multi-step
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Landscapes
- Element Separation (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13365874A JPS5329555B2 (index.php) | 1974-11-22 | 1974-11-22 | |
| DE19752551961 DE2551961A1 (de) | 1974-11-22 | 1975-11-19 | Verfahren zur herstellung eines halbleiterbauelementes |
| US05/634,783 US4045249A (en) | 1974-11-22 | 1975-11-24 | Oxide film isolation process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13365874A JPS5329555B2 (index.php) | 1974-11-22 | 1974-11-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5160474A JPS5160474A (index.php) | 1976-05-26 |
| JPS5329555B2 true JPS5329555B2 (index.php) | 1978-08-22 |
Family
ID=15109906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13365874A Expired JPS5329555B2 (index.php) | 1974-11-22 | 1974-11-22 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4045249A (index.php) |
| JP (1) | JPS5329555B2 (index.php) |
| DE (1) | DE2551961A1 (index.php) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5240977A (en) * | 1975-09-26 | 1977-03-30 | Matsushita Electric Ind Co Ltd | Process for production of semiconductor device |
| US4179311A (en) * | 1977-01-17 | 1979-12-18 | Mostek Corporation | Method of stabilizing semiconductor device by converting doped poly-Si to polyoxides |
| US4195307A (en) * | 1977-07-25 | 1980-03-25 | International Business Machines Corporation | Fabricating integrated circuits incorporating high-performance bipolar transistors |
| US4099987A (en) * | 1977-07-25 | 1978-07-11 | International Business Machines Corporation | Fabricating integrated circuits incorporating high-performance bipolar transistors |
| NL7709363A (nl) * | 1977-08-25 | 1979-02-27 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd onder toepassing van een dergelijke werkwijze. |
| US4139442A (en) * | 1977-09-13 | 1979-02-13 | International Business Machines Corporation | Reactive ion etching method for producing deep dielectric isolation in silicon |
| FR2454698A1 (fr) * | 1979-04-20 | 1980-11-14 | Radiotechnique Compelec | Procede de realisation de circuits integres a l'aide d'un masque multicouche et dispositifs obtenus par ce procede |
| JPS5946065A (ja) * | 1982-09-09 | 1984-03-15 | Toshiba Corp | 半導体装置の製造方法 |
| US5236856A (en) * | 1991-08-30 | 1993-08-17 | Micron Technology, Inc. | Method for minimizing diffusion of conductivity enhancing impurities from one region of polysilicon layer to another region and a semiconductor device produced according to the method |
| US5273924A (en) * | 1991-08-30 | 1993-12-28 | Micron Technology, Inc. | Method for forming an SRAM by minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another region |
| US6780718B2 (en) | 1993-11-30 | 2004-08-24 | Stmicroelectronics, Inc. | Transistor structure and method for making same |
| US5485029A (en) * | 1994-06-30 | 1996-01-16 | International Business Machines Corporation | On-chip ground plane for semiconductor devices to reduce parasitic signal propagation |
| US5998277A (en) * | 1998-03-13 | 1999-12-07 | Texas Instruments - Acer Incorporated | Method to form global planarized shallow trench isolation |
| US6175147B1 (en) * | 1998-05-14 | 2001-01-16 | Micron Technology Inc. | Device isolation for semiconductor devices |
| TW495859B (en) * | 2001-07-23 | 2002-07-21 | Mosel Vitelic Inc | Method for preventing gate oxide thinning |
| JP4556376B2 (ja) * | 2001-09-12 | 2010-10-06 | セイコーエプソン株式会社 | 半導体基板の製造方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3622382A (en) * | 1969-05-05 | 1971-11-23 | Ibm | Semiconductor isolation structure and method of producing |
| US3666548A (en) * | 1970-01-06 | 1972-05-30 | Ibm | Monocrystalline semiconductor body having dielectrically isolated regions and method of forming |
| US3947299A (en) * | 1971-05-22 | 1976-03-30 | U.S. Philips Corporation | Method of manufacturing semiconductor devices |
| US3748187A (en) * | 1971-08-03 | 1973-07-24 | Hughes Aircraft Co | Self-registered doped layer for preventing field inversion in mis circuits |
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1974
- 1974-11-22 JP JP13365874A patent/JPS5329555B2/ja not_active Expired
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1975
- 1975-11-19 DE DE19752551961 patent/DE2551961A1/de active Pending
- 1975-11-24 US US05/634,783 patent/US4045249A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4045249A (en) | 1977-08-30 |
| JPS5160474A (index.php) | 1976-05-26 |
| DE2551961A1 (de) | 1976-05-26 |