JPS5321566A - Semiconductor integrated circuit packaging structure - Google Patents

Semiconductor integrated circuit packaging structure

Info

Publication number
JPS5321566A
JPS5321566A JP9653576A JP9653576A JPS5321566A JP S5321566 A JPS5321566 A JP S5321566A JP 9653576 A JP9653576 A JP 9653576A JP 9653576 A JP9653576 A JP 9653576A JP S5321566 A JPS5321566 A JP S5321566A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
packaging structure
circuit packaging
mountable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9653576A
Other languages
Japanese (ja)
Inventor
Yoshimasa Kaneko
Masanobu Ohata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP9653576A priority Critical patent/JPS5321566A/en
Publication of JPS5321566A publication Critical patent/JPS5321566A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To accurately transmit a high speed output signal by providing terminals which are mountable to and removable from the connector of a transmission cable to one side of a package.
COPYRIGHT: (C)1978,JPO&Japio
JP9653576A 1976-08-11 1976-08-11 Semiconductor integrated circuit packaging structure Pending JPS5321566A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9653576A JPS5321566A (en) 1976-08-11 1976-08-11 Semiconductor integrated circuit packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9653576A JPS5321566A (en) 1976-08-11 1976-08-11 Semiconductor integrated circuit packaging structure

Publications (1)

Publication Number Publication Date
JPS5321566A true JPS5321566A (en) 1978-02-28

Family

ID=14167806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9653576A Pending JPS5321566A (en) 1976-08-11 1976-08-11 Semiconductor integrated circuit packaging structure

Country Status (1)

Country Link
JP (1) JPS5321566A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0531252U (en) * 1991-09-30 1993-04-23 テイアツク株式会社 Semiconductor integrated circuit device
US6037669A (en) * 1994-04-07 2000-03-14 Vlsi Technology, Inc. Staggered pad array

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4934348B1 (en) * 1966-08-12 1974-09-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4934348B1 (en) * 1966-08-12 1974-09-13

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0531252U (en) * 1991-09-30 1993-04-23 テイアツク株式会社 Semiconductor integrated circuit device
US6037669A (en) * 1994-04-07 2000-03-14 Vlsi Technology, Inc. Staggered pad array

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