JPS53139962A - Flip flop circuit - Google Patents

Flip flop circuit

Info

Publication number
JPS53139962A
JPS53139962A JP5428377A JP5428377A JPS53139962A JP S53139962 A JPS53139962 A JP S53139962A JP 5428377 A JP5428377 A JP 5428377A JP 5428377 A JP5428377 A JP 5428377A JP S53139962 A JPS53139962 A JP S53139962A
Authority
JP
Japan
Prior art keywords
flip flop
flop circuit
collector
circuit
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5428377A
Other languages
Japanese (ja)
Inventor
Mitsuo Usami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5428377A priority Critical patent/JPS53139962A/en
Publication of JPS53139962A publication Critical patent/JPS53139962A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To reduce the number of gates for the FF circuit using IIL inverter, by providing the difference for signal transfer delay time between the first and second collector of a multi-collector transistor, and by taking the incoming period of clock pulse within the said time defference.
JP5428377A 1977-05-13 1977-05-13 Flip flop circuit Pending JPS53139962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5428377A JPS53139962A (en) 1977-05-13 1977-05-13 Flip flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5428377A JPS53139962A (en) 1977-05-13 1977-05-13 Flip flop circuit

Publications (1)

Publication Number Publication Date
JPS53139962A true JPS53139962A (en) 1978-12-06

Family

ID=12966225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5428377A Pending JPS53139962A (en) 1977-05-13 1977-05-13 Flip flop circuit

Country Status (1)

Country Link
JP (1) JPS53139962A (en)

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