JPS53108247A - Electrically programmable floating gate semiconductor memory - Google Patents
Electrically programmable floating gate semiconductor memoryInfo
- Publication number
- JPS53108247A JPS53108247A JP15716977A JP15716977A JPS53108247A JP S53108247 A JPS53108247 A JP S53108247A JP 15716977 A JP15716977 A JP 15716977A JP 15716977 A JP15716977 A JP 15716977A JP S53108247 A JPS53108247 A JP S53108247A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor memory
- floating gate
- electrically programmable
- gate semiconductor
- programmable floating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US75414576A | 1976-12-27 | 1976-12-27 | |
US05/754,207 US4122544A (en) | 1976-12-27 | 1976-12-27 | Electrically alterable floating gate semiconductor memory device with series enhancement transistor |
US05/754,144 US4112509A (en) | 1976-12-27 | 1976-12-27 | Electrically alterable floating gate semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53108247A true JPS53108247A (en) | 1978-09-20 |
Family
ID=27419460
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15716977A Pending JPS53108247A (en) | 1976-12-27 | 1977-12-26 | Electrically programmable floating gate semiconductor memory |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPS53108247A (ja) |
DE (1) | DE2758161A1 (ja) |
FR (1) | FR2375692A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5546598A (en) * | 1978-09-28 | 1980-04-01 | Rca Corp | Durable memory array |
JPS61127179A (ja) * | 1984-11-21 | 1986-06-14 | ローム・コーポレーション | 単一トランジスタの電気的プログラム式メモリ装置、その製造方法及び使用方法 |
JPS62115777A (ja) * | 1985-08-02 | 1987-05-27 | ウエハスケ−ル インテグレ−シヨン,インコ−ポレイテツド | Epromアレイ |
JPS63239689A (ja) * | 1980-02-04 | 1988-10-05 | テキサス インスツルメンツ インコ−ポレイテツド | 記憶装置 |
US9030877B2 (en) | 2007-08-30 | 2015-05-12 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6025837B2 (ja) * | 1978-09-14 | 1985-06-20 | 株式会社東芝 | 半導体記憶装置 |
FR2462781A1 (fr) * | 1979-07-27 | 1981-02-13 | Thomson Csf | Transistor a effet de champ a grille schottky autoalignee et son procede de fabrication |
US4376947A (en) * | 1979-09-04 | 1983-03-15 | Texas Instruments Incorporated | Electrically programmable floating gate semiconductor memory device |
JPS5654693A (en) * | 1979-10-05 | 1981-05-14 | Hitachi Ltd | Programable rom |
FR2468185A1 (fr) * | 1980-10-17 | 1981-04-30 | Intel Corp | Procede de fabrication d'une matrice de memoire electriquement programmable a haute densite |
JPS57192067A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Erasable and programmable read only memory unit |
DE3924062C2 (de) * | 1989-07-21 | 1993-11-25 | Eurosil Electronic Gmbh | EEPROM-Halbleitereinrichtung mit Isolierzonen für Niedervolt-Logikelemente |
US5659500A (en) * | 1995-09-26 | 1997-08-19 | Texas Instruments Incorporated | Nonvolatile memory array with compatible vertical source lines |
EP1240670A1 (de) | 1999-12-20 | 2002-09-18 | Infineon Technologies AG | Nichtflüchtige nor-halbleiterspeichereinrichtung und verfahren zu deren programmierung |
DE10058948A1 (de) | 2000-11-28 | 2002-06-06 | Infineon Technologies Ag | Halbleiterschaltungsanordnung sowie dazugehöriges Herstellungsverfahren |
-
1977
- 1977-12-26 JP JP15716977A patent/JPS53108247A/ja active Pending
- 1977-12-26 FR FR7739174A patent/FR2375692A1/fr not_active Withdrawn
- 1977-12-27 DE DE19772758161 patent/DE2758161A1/de not_active Withdrawn
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5546598A (en) * | 1978-09-28 | 1980-04-01 | Rca Corp | Durable memory array |
JPS5732514B2 (ja) * | 1978-09-28 | 1982-07-12 | ||
JPS63239689A (ja) * | 1980-02-04 | 1988-10-05 | テキサス インスツルメンツ インコ−ポレイテツド | 記憶装置 |
JPH0472320B2 (ja) * | 1980-02-04 | 1992-11-17 | Texas Instruments Inc | |
JPS61127179A (ja) * | 1984-11-21 | 1986-06-14 | ローム・コーポレーション | 単一トランジスタの電気的プログラム式メモリ装置、その製造方法及び使用方法 |
JPH0629553A (ja) * | 1984-11-21 | 1994-02-04 | Rohm Corp | メモリー装置 |
JPS62115777A (ja) * | 1985-08-02 | 1987-05-27 | ウエハスケ−ル インテグレ−シヨン,インコ−ポレイテツド | Epromアレイ |
US9030877B2 (en) | 2007-08-30 | 2015-05-12 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
Also Published As
Publication number | Publication date |
---|---|
DE2758161A1 (de) | 1978-07-06 |
FR2375692A1 (fr) | 1978-07-21 |
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