JPS5271141A - Word line driving circuit - Google Patents
Word line driving circuitInfo
- Publication number
- JPS5271141A JPS5271141A JP50146441A JP14644175A JPS5271141A JP S5271141 A JPS5271141 A JP S5271141A JP 50146441 A JP50146441 A JP 50146441A JP 14644175 A JP14644175 A JP 14644175A JP S5271141 A JPS5271141 A JP S5271141A
- Authority
- JP
- Japan
- Prior art keywords
- word line
- driving circuit
- line driving
- circuit
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50146441A JPS5271141A (en) | 1975-12-10 | 1975-12-10 | Word line driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50146441A JPS5271141A (en) | 1975-12-10 | 1975-12-10 | Word line driving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5271141A true JPS5271141A (en) | 1977-06-14 |
| JPS557637B2 JPS557637B2 (https=) | 1980-02-27 |
Family
ID=15407717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50146441A Granted JPS5271141A (en) | 1975-12-10 | 1975-12-10 | Word line driving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5271141A (https=) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5674890A (en) * | 1979-11-19 | 1981-06-20 | Hitachi Ltd | Address decoder output circuit |
| JPH02236893A (ja) * | 1990-02-23 | 1990-09-19 | Hitachi Ltd | 半導体メモリ装置 |
| JPH03137891A (ja) * | 1990-05-18 | 1991-06-12 | Hitachi Ltd | 半導体メモリ装置 |
| US5550504A (en) * | 1990-09-12 | 1996-08-27 | Kabushiki Kaisha Toshiba | Dram using word line potential control circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4968631A (https=) * | 1972-11-06 | 1974-07-03 |
-
1975
- 1975-12-10 JP JP50146441A patent/JPS5271141A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4968631A (https=) * | 1972-11-06 | 1974-07-03 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5674890A (en) * | 1979-11-19 | 1981-06-20 | Hitachi Ltd | Address decoder output circuit |
| JPH02236893A (ja) * | 1990-02-23 | 1990-09-19 | Hitachi Ltd | 半導体メモリ装置 |
| JPH03137891A (ja) * | 1990-05-18 | 1991-06-12 | Hitachi Ltd | 半導体メモリ装置 |
| US5550504A (en) * | 1990-09-12 | 1996-08-27 | Kabushiki Kaisha Toshiba | Dram using word line potential control circuit |
| US5619162A (en) * | 1990-09-12 | 1997-04-08 | Kabushiki Kaisha Toshiba | Dram using word line potential circuit control |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS557637B2 (https=) | 1980-02-27 |
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