JPS5233434A - Non-volatility semiconductor memory unit - Google Patents

Non-volatility semiconductor memory unit

Info

Publication number
JPS5233434A
JPS5233434A JP10961375A JP10961375A JPS5233434A JP S5233434 A JPS5233434 A JP S5233434A JP 10961375 A JP10961375 A JP 10961375A JP 10961375 A JP10961375 A JP 10961375A JP S5233434 A JPS5233434 A JP S5233434A
Authority
JP
Japan
Prior art keywords
memory unit
semiconductor memory
samos
control
volatility semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10961375A
Other languages
Japanese (ja)
Other versions
JPS586238B2 (en
Inventor
Fujio Yasuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50109613A priority Critical patent/JPS586238B2/en
Publication of JPS5233434A publication Critical patent/JPS5233434A/en
Publication of JPS586238B2 publication Critical patent/JPS586238B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:A non-voltaility memory unit consisting of SAMOS Tr, making external control terminals unnecessary by integrating totally the control gate control cicuit commonly connected to the control gates of all SAMOS Transistors (SAMOS Tr).
JP50109613A 1975-09-10 1975-09-10 Fukihatsei Handout Thai Memory Souch Expired JPS586238B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50109613A JPS586238B2 (en) 1975-09-10 1975-09-10 Fukihatsei Handout Thai Memory Souch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50109613A JPS586238B2 (en) 1975-09-10 1975-09-10 Fukihatsei Handout Thai Memory Souch

Publications (2)

Publication Number Publication Date
JPS5233434A true JPS5233434A (en) 1977-03-14
JPS586238B2 JPS586238B2 (en) 1983-02-03

Family

ID=14514724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50109613A Expired JPS586238B2 (en) 1975-09-10 1975-09-10 Fukihatsei Handout Thai Memory Souch

Country Status (1)

Country Link
JP (1) JPS586238B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02357A (en) * 1988-05-20 1990-01-05 Hitachi Ltd Semiconductor device
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02357A (en) * 1988-05-20 1990-01-05 Hitachi Ltd Semiconductor device
JPH0543301B2 (en) * 1988-05-20 1993-07-01 Hitachi Ltd
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Also Published As

Publication number Publication date
JPS586238B2 (en) 1983-02-03

Similar Documents

Publication Publication Date Title
JPS5233434A (en) Non-volatility semiconductor memory unit
JPS5235537A (en) Mos memory unit
JPS5275987A (en) Gate protecting device
JPS53116008A (en) Electronic type key telephone
JPS53108737A (en) Memory circuit
JPS5436139A (en) Sense circuit of differential type
JPS533160A (en) Gate circuit
JPS53108740A (en) Memory circuit
JPS51111043A (en) Mis logical circuit
JPS5313849A (en) Output circuit
JPS51142932A (en) Semiconductor memory devices
JPS5211831A (en) Memory control unit
JPS53121589A (en) Semiconductor logic circuit device
JPS5276867A (en) Signal holding circuit
JPS53132969A (en) Selective gate circuit
JPS546444A (en) Static latch circuit
JPS5384636A (en) Sense amplifier circuit
JPS5236476A (en) Non-volatile semiconductor memory
JPS53102654A (en) Non-volatile flip flop circuit
JPS51147133A (en) Non-voratile insulation gate semiconductor memory
JPS5440533A (en) Semiconductor memory unit
JPS5428577A (en) Semiconductor nonvolatile memory device
JPS5352325A (en) Mos random access memory
JPS526036A (en) Semiconductor memory circuit
JPS5248936A (en) Memory surrounding circuit