JPS5213772A - Ic package - Google Patents

Ic package

Info

Publication number
JPS5213772A
JPS5213772A JP50089939A JP8993975A JPS5213772A JP S5213772 A JPS5213772 A JP S5213772A JP 50089939 A JP50089939 A JP 50089939A JP 8993975 A JP8993975 A JP 8993975A JP S5213772 A JPS5213772 A JP S5213772A
Authority
JP
Japan
Prior art keywords
package
conductor patterns
proper adjustment
decrease resistance
decrease
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50089939A
Other languages
Japanese (ja)
Other versions
JPS5436031B2 (en
Inventor
Kazuo Nitta
Shuzo Tano
Satoshi Minami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KIYOOSERA INTERN Inc
KIYOOSERA INTERNATL Inc
KIYOUTO SERAMITSUKU KK
Kyoto Ceramic Co Ltd
Kyocera Corp
Original Assignee
KIYOOSERA INTERN Inc
KIYOOSERA INTERNATL Inc
KIYOUTO SERAMITSUKU KK
Kyoto Ceramic Co Ltd
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KIYOOSERA INTERN Inc, KIYOOSERA INTERNATL Inc, KIYOUTO SERAMITSUKU KK, Kyoto Ceramic Co Ltd, Kyocera Corp filed Critical KIYOOSERA INTERN Inc
Priority to JP50089939A priority Critical patent/JPS5213772A/en
Publication of JPS5213772A publication Critical patent/JPS5213772A/en
Publication of JPS5436031B2 publication Critical patent/JPS5436031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE: To provide an IC package which can decrease resistance in conductor patterns for proper adjustment.
COPYRIGHT: (C)1977,JPO&Japio
JP50089939A 1975-07-22 1975-07-22 Ic package Granted JPS5213772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50089939A JPS5213772A (en) 1975-07-22 1975-07-22 Ic package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50089939A JPS5213772A (en) 1975-07-22 1975-07-22 Ic package

Publications (2)

Publication Number Publication Date
JPS5213772A true JPS5213772A (en) 1977-02-02
JPS5436031B2 JPS5436031B2 (en) 1979-11-07

Family

ID=13984658

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50089939A Granted JPS5213772A (en) 1975-07-22 1975-07-22 Ic package

Country Status (1)

Country Link
JP (1) JPS5213772A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59215749A (en) * 1983-05-24 1984-12-05 Nippon Telegr & Teleph Corp <Ntt> Low noise package for semiconductor integrated circuit
JPS6045045A (en) * 1983-08-23 1985-03-11 Shinko Electric Ind Co Ltd Multilayer ceramic package

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3400456A (en) * 1965-08-30 1968-09-10 Western Electric Co Methods of manufacturing thin film components
US3423517A (en) * 1966-07-27 1969-01-21 Dielectric Systems Inc Monolithic ceramic electrical interconnecting structure
JPS4938575A (en) * 1972-07-10 1974-04-10
JPS5029281A (en) * 1973-07-20 1975-03-25

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3400456A (en) * 1965-08-30 1968-09-10 Western Electric Co Methods of manufacturing thin film components
US3423517A (en) * 1966-07-27 1969-01-21 Dielectric Systems Inc Monolithic ceramic electrical interconnecting structure
JPS4938575A (en) * 1972-07-10 1974-04-10
JPS5029281A (en) * 1973-07-20 1975-03-25

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59215749A (en) * 1983-05-24 1984-12-05 Nippon Telegr & Teleph Corp <Ntt> Low noise package for semiconductor integrated circuit
JPS6045045A (en) * 1983-08-23 1985-03-11 Shinko Electric Ind Co Ltd Multilayer ceramic package
JPH0478014B2 (en) * 1983-08-23 1992-12-10 Shinko Elec Ind

Also Published As

Publication number Publication date
JPS5436031B2 (en) 1979-11-07

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