JPS52117036A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS52117036A
JPS52117036A JP1031977A JP1031977A JPS52117036A JP S52117036 A JPS52117036 A JP S52117036A JP 1031977 A JP1031977 A JP 1031977A JP 1031977 A JP1031977 A JP 1031977A JP S52117036 A JPS52117036 A JP S52117036A
Authority
JP
Japan
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1031977A
Other languages
English (en)
Japanese (ja)
Inventor
Kei Uiidoman Jiigufuriido
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS52117036A publication Critical patent/JPS52117036A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091Integrated injection logic or merged transistor logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65Integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP1031977A 1976-03-25 1977-02-03 Semiconductor memory Pending JPS52117036A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2612666A DE2612666C2 (de) 1976-03-25 1976-03-25 Integrierte, invertierende logische Schaltung

Publications (1)

Publication Number Publication Date
JPS52117036A true JPS52117036A (en) 1977-10-01

Family

ID=5973395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1031977A Pending JPS52117036A (en) 1976-03-25 1977-02-03 Semiconductor memory

Country Status (4)

Country Link
JP (1) JPS52117036A (enrdf_load_stackoverflow)
DE (1) DE2612666C2 (enrdf_load_stackoverflow)
FR (1) FR2345859A1 (enrdf_load_stackoverflow)
GB (1) GB1569800A (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2816949C3 (de) * 1978-04-19 1981-07-16 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte Halbleiteranordnung und deren Verwendung zum Aufbau einer Speicheranordnung
US4221977A (en) * 1978-12-11 1980-09-09 Motorola, Inc. Static I2 L ram
DE2855866C3 (de) * 1978-12-22 1981-10-29 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Schaltungsanordnung zum Betreiben eines integrierten Halbleiterspeichers
DE2926514A1 (de) 1979-06-30 1981-01-15 Ibm Deutschland Elektrische speicheranordnung und verfahren zu ihrem betrieb
EP0065999B1 (de) * 1981-05-30 1986-05-07 Ibm Deutschland Gmbh Hochintegrierter schneller Speicher mit bipolaren Transistoren
DE3380678D1 (en) * 1983-05-25 1989-11-09 Ibm Deutschland Semiconductor memory
EP0166043B1 (en) * 1984-06-25 1990-09-19 International Business Machines Corporation Mtl storage cell with inherent output multiplex capability
EP0195839B1 (en) * 1985-03-29 1989-08-09 Ibm Deutschland Gmbh Stability testing of semiconductor memories

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4924329A (enrdf_load_stackoverflow) * 1972-05-11 1974-03-04

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2021824C3 (de) * 1970-05-05 1980-08-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Halbleiterschaltung
US3816758A (en) * 1971-04-14 1974-06-11 Ibm Digital logic circuit
DE2356301C3 (de) * 1973-11-10 1982-03-11 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte, logische Schaltung

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4924329A (enrdf_load_stackoverflow) * 1972-05-11 1974-03-04

Also Published As

Publication number Publication date
DE2612666A1 (de) 1977-09-29
DE2612666C2 (de) 1982-11-18
FR2345859B1 (enrdf_load_stackoverflow) 1980-02-08
FR2345859A1 (fr) 1977-10-21
GB1569800A (en) 1980-06-18

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