JPS51105241A - Lsi shifutorejisuta no fifo memoriomochiiru lsi memorikiokuyunitsutonai no eraarogingu - Google Patents
Lsi shifutorejisuta no fifo memoriomochiiru lsi memorikiokuyunitsutonai no eraaroginguInfo
- Publication number
- JPS51105241A JPS51105241A JP50151212A JP15121275A JPS51105241A JP S51105241 A JPS51105241 A JP S51105241A JP 50151212 A JP50151212 A JP 50151212A JP 15121275 A JP15121275 A JP 15121275A JP S51105241 A JPS51105241 A JP S51105241A
- Authority
- JP
- Japan
- Prior art keywords
- address data
- error
- lsi
- defective
- correctable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US533565A US3917933A (en) | 1974-12-17 | 1974-12-17 | Error logging in LSI memory storage units using FIFO memory of LSI shift registers |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS51105241A true JPS51105241A (en) | 1976-09-17 |
Family
ID=24126521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50151212A Pending JPS51105241A (en) | 1974-12-17 | 1975-12-17 | Lsi shifutorejisuta no fifo memoriomochiiru lsi memorikiokuyunitsutonai no eraarogingu |
Country Status (8)
Country | Link |
---|---|
US (1) | US3917933A (ja) |
JP (1) | JPS51105241A (ja) |
DE (1) | DE2556556A1 (ja) |
FR (1) | FR2295532A1 (ja) |
GB (1) | GB1534523A (ja) |
IT (1) | IT1051813B (ja) |
NL (1) | NL7514428A (ja) |
SE (1) | SE417652B (ja) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7415966A (nl) * | 1974-12-09 | 1976-06-11 | Philips Nv | Werkwijze en inrichting voor het opslaan van binaire informatie-elementen. |
JPS5721799B2 (ja) * | 1975-02-01 | 1982-05-10 | ||
US4058851A (en) * | 1976-10-18 | 1977-11-15 | Sperry Rand Corporation | Conditional bypass of error correction for dual memory access time selection |
US4174537A (en) * | 1977-04-04 | 1979-11-13 | Burroughs Corporation | Time-shared, multi-phase memory accessing system having automatically updatable error logging means |
US4333142A (en) * | 1977-07-22 | 1982-06-01 | Chesley Gilman D | Self-configurable computer and memory system |
US4191996A (en) * | 1977-07-22 | 1980-03-04 | Chesley Gilman D | Self-configurable computer and memory system |
US4139148A (en) * | 1977-08-25 | 1979-02-13 | Sperry Rand Corporation | Double bit error correction using single bit error correction, double bit error detection logic and syndrome bit memory |
US4255808A (en) * | 1979-04-19 | 1981-03-10 | Sperry Corporation | Hard or soft cell failure differentiator |
JPS6051749B2 (ja) * | 1979-08-31 | 1985-11-15 | 富士通株式会社 | エラ−訂正方式 |
US4380067A (en) * | 1981-04-15 | 1983-04-12 | International Business Machines Corporation | Error control in a hierarchical system |
US4460999A (en) * | 1981-07-15 | 1984-07-17 | Pacific Western Systems, Inc. | Memory tester having memory repair analysis under pattern generator control |
US4450524A (en) * | 1981-09-23 | 1984-05-22 | Rca Corporation | Single chip microcomputer with external decoder and memory and internal logic for disabling the ROM and relocating the RAM |
US4538265A (en) * | 1983-03-24 | 1985-08-27 | International Business Machines Corporation | Method and apparatus for instruction parity error recovery |
JPS607549A (ja) * | 1983-06-24 | 1985-01-16 | Mitsubishi Electric Corp | 故障診断装置 |
US4625273A (en) * | 1983-08-30 | 1986-11-25 | Amdahl Corporation | Apparatus for fast data storage with deferred error reporting |
US4584681A (en) * | 1983-09-02 | 1986-04-22 | International Business Machines Corporation | Memory correction scheme using spare arrays |
US4586178A (en) * | 1983-10-06 | 1986-04-29 | Eaton Corporation | High speed redundancy processor |
US4759020A (en) * | 1985-09-25 | 1988-07-19 | Unisys Corporation | Self-healing bubble memories |
US4661953A (en) * | 1985-10-22 | 1987-04-28 | Amdahl Corporation | Error tracking apparatus in a data processing system |
US4916654A (en) * | 1988-09-06 | 1990-04-10 | International Business Machines Corporation | Method for transfer of data via a window buffer from a bit-planar memory to a selected position in a target memory |
US5146574A (en) * | 1989-06-27 | 1992-09-08 | Sf2 Corporation | Method and circuit for programmable selecting a variable sequence of element using write-back |
US5315708A (en) * | 1990-02-28 | 1994-05-24 | Micro Technology, Inc. | Method and apparatus for transferring data through a staging memory |
US5140592A (en) * | 1990-03-02 | 1992-08-18 | Sf2 Corporation | Disk array system |
US5233618A (en) * | 1990-03-02 | 1993-08-03 | Micro Technology, Inc. | Data correcting applicable to redundant arrays of independent disks |
US5212785A (en) * | 1990-04-06 | 1993-05-18 | Micro Technology, Inc. | Apparatus and method for controlling data flow between a computer and memory devices |
US5134619A (en) * | 1990-04-06 | 1992-07-28 | Sf2 Corporation | Failure-tolerant mass storage system |
US5388243A (en) * | 1990-03-09 | 1995-02-07 | Mti Technology Corporation | Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture |
US5325497A (en) * | 1990-03-29 | 1994-06-28 | Micro Technology, Inc. | Method and apparatus for assigning signatures to identify members of a set of mass of storage devices |
US5202856A (en) * | 1990-04-05 | 1993-04-13 | Micro Technology, Inc. | Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports |
US5214778A (en) * | 1990-04-06 | 1993-05-25 | Micro Technology, Inc. | Resource management in a multiple resource system |
US5956524A (en) * | 1990-04-06 | 1999-09-21 | Micro Technology Inc. | System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources |
US5233692A (en) * | 1990-04-06 | 1993-08-03 | Micro Technology, Inc. | Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface |
US5414818A (en) * | 1990-04-06 | 1995-05-09 | Mti Technology Corporation | Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol |
US5426639A (en) * | 1991-11-29 | 1995-06-20 | At&T Corp. | Multiple virtual FIFO arrangement |
US6781895B1 (en) * | 1991-12-19 | 2004-08-24 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device and memory system using the same |
US5956352A (en) * | 1992-04-24 | 1999-09-21 | Digital Equipment Corporation | Adjustable filter for error detecting and correcting system |
US5859627A (en) * | 1992-10-19 | 1999-01-12 | Fujitsu Limited | Driving circuit for liquid-crystal display device |
US5867640A (en) * | 1993-06-01 | 1999-02-02 | Mti Technology Corp. | Apparatus and method for improving write-throughput in a redundant array of mass storage devices |
US20030088611A1 (en) * | 1994-01-19 | 2003-05-08 | Mti Technology Corporation | Systems and methods for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources |
US6438714B1 (en) * | 1999-03-31 | 2002-08-20 | International Business Machines Corporation | Method and apparatus for testing large arrays of storage devices |
US7624323B2 (en) * | 2006-10-31 | 2009-11-24 | Hewlett-Packard Development Company, L.P. | Method and apparatus for testing an IC device based on relative timing of test signals |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3222653A (en) * | 1961-09-18 | 1965-12-07 | Ibm | Memory system for using a memory despite the presence of defective bits therein |
US3444526A (en) * | 1966-06-08 | 1969-05-13 | Ibm | Storage system using a storage device having defective storage locations |
US3633175A (en) * | 1969-05-15 | 1972-01-04 | Honeywell Inc | Defect-tolerant digital memory system |
US3697949A (en) * | 1970-12-31 | 1972-10-10 | Ibm | Error correction system for use with a rotational single-error correction, double-error detection hamming code |
US3794819A (en) * | 1972-07-03 | 1974-02-26 | Advanced Memory Syst Inc | Error correction method and apparatus |
US3803560A (en) * | 1973-01-03 | 1974-04-09 | Honeywell Inf Systems | Technique for detecting memory failures and to provide for automatically for reconfiguration of the memory modules of a memory system |
US3872291A (en) * | 1974-03-26 | 1975-03-18 | Honeywell Inf Systems | Field repairable memory subsystem |
-
1974
- 1974-12-17 US US533565A patent/US3917933A/en not_active Expired - Lifetime
-
1975
- 1975-12-02 IT IT29934/75A patent/IT1051813B/it active
- 1975-12-10 NL NL7514428A patent/NL7514428A/xx not_active Application Discontinuation
- 1975-12-16 DE DE19752556556 patent/DE2556556A1/de not_active Ceased
- 1975-12-16 SE SE7514217A patent/SE417652B/xx not_active IP Right Cessation
- 1975-12-16 FR FR7538447A patent/FR2295532A1/fr active Pending
- 1975-12-17 JP JP50151212A patent/JPS51105241A/ja active Pending
- 1975-12-17 GB GB51624/75A patent/GB1534523A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2556556A1 (de) | 1976-07-01 |
FR2295532A1 (fr) | 1976-07-16 |
US3917933A (en) | 1975-11-04 |
IT1051813B (it) | 1981-05-20 |
NL7514428A (nl) | 1976-06-21 |
SE7514217L (sv) | 1976-06-18 |
GB1534523A (en) | 1978-12-06 |
SE417652B (sv) | 1981-03-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS51105241A (en) | Lsi shifutorejisuta no fifo memoriomochiiru lsi memorikiokuyunitsutonai no eraarogingu | |
ES439166A1 (es) | Mejoras introducidas en un sistema de proceso de datos que incluye un sistema de memoria lsi a base de semiconductores. | |
JPS5486245A (en) | Memory error logger for distinguishing solid error from transient error | |
KR102288723B1 (ko) | 매체 지속성 및 진단을 위한 향상된 부호워드 | |
KR920006996A (ko) | 용장 회로부 메모리 ic의 시험 장치 | |
GB1429708A (en) | Memory module with error correction and diagnosis | |
DE3587145T2 (de) | Puffersystem mit erkennung von lese- oder schreibschaltungsfehlern. | |
US3735105A (en) | Error correcting system and method for monolithic memories | |
DE3380910D1 (de) | Verfahren zur datenwoerterspeicherung in fehlertolerantem speicher zur behebung von unkorrigierbaren fehlern. | |
GB2201016B (en) | Memories and the testing thereof | |
US3906200A (en) | Error logging in semiconductor storage units | |
JPS5283044A (en) | Device and method of checking control memory | |
KR920010653A (ko) | 메모리 불량 해석 장치 | |
US7404118B1 (en) | Memory error analysis for determining potentially faulty memory components | |
TWI511158B (zh) | 記憶體模組上之記憶體備用技術 | |
JPH02156345A (ja) | データ処理装置 | |
JPS585681A (ja) | 半導体メモリ試験装置 | |
JPS6120164A (ja) | 情報処理装置の障害防止方式 | |
JPH05266693A (ja) | メモリ装置の検査システム | |
JPS6030975B2 (ja) | 誤り検出方式 | |
JPS6035695B2 (ja) | メモリ試験方式 | |
JPS59127300A (ja) | 大容量記憶のパリテイ検査方法 | |
JPS61237148A (ja) | 記憶装置 |