|
US4115796A
(en)
*
|
1974-07-05 |
1978-09-19 |
Sharp Kabushiki Kaisha |
Complementary-MOS integrated semiconductor device
|
|
US3969633A
(en)
*
|
1975-01-08 |
1976-07-13 |
Mostek Corporation |
Self-biased trinary input circuit for MOSFET integrated circuit
|
|
US3925609A
(en)
*
|
1975-01-21 |
1975-12-09 |
Bell Telephone Labor Inc |
Animated display systems with dither threshold hysteresis band
|
|
US3959583A
(en)
*
|
1975-01-21 |
1976-05-25 |
Bell Telephone Laboratories, Incorporated |
Animated dithered display systems
|
|
US4160923A
(en)
*
|
1975-02-05 |
1979-07-10 |
Sharp Kabushiki Kaisha |
Touch sensitive electronic switching circuit for electronic wristwatches
|
|
US3971960A
(en)
*
|
1975-03-05 |
1976-07-27 |
Motorola, Inc. |
Flip-flop false output rejection circuit
|
|
JPS51130154A
(en)
*
|
1975-05-07 |
1976-11-12 |
Nec Corp |
Flip-flop circuit
|
|
GB1480984A
(en)
*
|
1975-09-25 |
1977-07-27 |
Standard Telephones Cables Ltd |
Schmitt trigger circuit
|
|
US4048524A
(en)
*
|
1976-04-21 |
1977-09-13 |
National Semiconductor Corporation |
MOS voltage level detecting and indicating apparatus
|
|
US4069429A
(en)
*
|
1976-09-13 |
1978-01-17 |
Harris Corporation |
IGFET clock generator
|
|
US4045688A
(en)
*
|
1976-10-26 |
1977-08-30 |
Rca Corporation |
Power-on reset circuit
|
|
US4104860A
(en)
*
|
1976-12-27 |
1978-08-08 |
Solid State Scientific Inc. |
High speed dynamic flip-flop system
|
|
NL7704005A
(nl)
*
|
1977-04-13 |
1977-06-30 |
Philips Nv |
Geintegreerde schakeling.
|
|
US4135102A
(en)
*
|
1977-07-18 |
1979-01-16 |
Mostek Corporation |
High performance inverter circuits
|
|
US4163907A
(en)
*
|
1977-09-16 |
1979-08-07 |
Harris Corporation |
Three logic state input buffers
|
|
JPS6035756B2
(ja)
*
|
1977-12-27 |
1985-08-16 |
日本電気株式会社 |
論理回路
|
|
JPS5567238A
(en)
*
|
1978-11-16 |
1980-05-21 |
Sony Corp |
Discrimination circuit
|
|
US4295062A
(en)
*
|
1979-04-02 |
1981-10-13 |
National Semiconductor Corporation |
CMOS Schmitt trigger and oscillator
|
|
US4435658A
(en)
*
|
1981-02-17 |
1984-03-06 |
Burroughs Corporation |
Two-level threshold circuitry for large scale integrated circuit memories
|
|
JPS5838032A
(ja)
*
|
1981-08-13 |
1983-03-05 |
Fujitsu Ltd |
C―mosインバータ駆動用バッファ回路
|
|
JPS5974721A
(ja)
*
|
1982-10-21 |
1984-04-27 |
Toshiba Corp |
シユミツト・トリガ回路
|
|
US4554467A
(en)
*
|
1983-06-22 |
1985-11-19 |
Motorola, Inc. |
CMOS Flip-flop
|
|
US4786824A
(en)
*
|
1984-05-24 |
1988-11-22 |
Kabushiki Kaisha Toshiba |
Input signal level detecting circuit
|
|
US4617477A
(en)
*
|
1985-05-21 |
1986-10-14 |
At&T Bell Laboratories |
Symmetrical output complementary buffer
|
|
US4950920A
(en)
*
|
1987-09-30 |
1990-08-21 |
Kabushiki Kaisha Toshiba |
Complementary signal output circuit with reduced skew
|
|
US4808840A
(en)
*
|
1987-11-20 |
1989-02-28 |
International Business Machines Corporation |
Dynamic edge-triggered latch
|
|
CA2008749C
(en)
*
|
1989-06-30 |
1999-11-30 |
Frank Wanlass |
Noise rejecting ttl to cmos input buffer
|
|
JP2958992B2
(ja)
*
|
1989-10-31 |
1999-10-06 |
日本電気株式会社 |
半導体集積回路
|
|
JPH03157850A
(ja)
*
|
1989-11-15 |
1991-07-05 |
Sony Corp |
集積回路装置
|
|
US5184032A
(en)
*
|
1991-04-25 |
1993-02-02 |
Texas Instruments Incorporated |
Glitch reduction in integrated circuits, systems and methods
|
|
US5121004A
(en)
*
|
1991-08-09 |
1992-06-09 |
Delco Electronics Corporation |
Input buffer with temperature compensated hysteresis and thresholds, including negative input voltage protection
|
|
JP2002222944A
(ja)
*
|
2001-01-26 |
2002-08-09 |
Kitakiyuushiyuu Techno Center:Kk |
半導体素子
|
|
RU2224355C2
(ru)
*
|
2001-09-13 |
2004-02-20 |
Российский Федеральный Ядерный Центр - Всероссийский Научно-Исследовательский Институт Экспериментальной Физики |
Генератор импульсов
|
|
RU2235417C2
(ru)
*
|
2001-12-06 |
2004-08-27 |
Российский федеральный ядерный центр - Всероссийский научно-исследовательский институт технической физики им. акад. Е.И. Забабахина |
Генератор прямоугольных импульсов
|
|
JP2003298405A
(ja)
*
|
2002-04-03 |
2003-10-17 |
Eng Kk |
半導体集積回路
|
|
TWI269529B
(en)
*
|
2005-06-14 |
2006-12-21 |
Richtek Technology Corp |
Tri-state output logic with zero quiescent current by one input control
|
|
JP2009147742A
(ja)
*
|
2007-12-14 |
2009-07-02 |
Seiko Epson Corp |
ノイズフィルタ回路、デッドタイム回路、遅延回路、およびその方法、ならびに、サーマルヘッドドライバ、サーマルヘッド、制御回路、電子機器、および印刷システム
|
|
DE102008048830B4
(de)
*
|
2008-09-25 |
2010-11-04 |
Austriamicrosystems Ag |
Schaltungsanordnung mit Schmelzsicherung und Verfahren zum Ermitteln eines Zustands einer Schmelzsicherung
|