JPS4998609A - - Google Patents

Info

Publication number
JPS4998609A
JPS4998609A JP48132265A JP13226573A JPS4998609A JP S4998609 A JPS4998609 A JP S4998609A JP 48132265 A JP48132265 A JP 48132265A JP 13226573 A JP13226573 A JP 13226573A JP S4998609 A JPS4998609 A JP S4998609A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP48132265A
Other versions
JPS5329448B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4998609A publication Critical patent/JPS4998609A/ja
Publication of JPS5329448B2 publication Critical patent/JPS5329448B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0087—Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP13226573A 1972-12-27 1973-11-27 Expired JPS5329448B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00318971A US3805180A (en) 1972-12-27 1972-12-27 Binary-coded signal timing recovery circuit

Publications (2)

Publication Number Publication Date
JPS4998609A true JPS4998609A (ja) 1974-09-18
JPS5329448B2 JPS5329448B2 (ja) 1978-08-21

Family

ID=23240348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13226573A Expired JPS5329448B2 (ja) 1972-12-27 1973-11-27

Country Status (7)

Country Link
US (1) US3805180A (ja)
JP (1) JPS5329448B2 (ja)
CA (1) CA1000368A (ja)
DE (1) DE2355470C3 (ja)
FR (1) FR2212702B1 (ja)
GB (1) GB1445725A (ja)
IT (1) IT998627B (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04260239A (ja) * 1991-02-15 1992-09-16 Nec Corp タイミング抽出回路

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2205775B1 (ja) * 1972-11-06 1980-04-30 Cit Alcatel
CA1063719A (en) * 1975-04-28 1979-10-02 Control Data Corporation Phase locked loop decoder
IT1074199B (it) * 1976-12-23 1985-04-17 Italiana Telecomunicazioni Ora Memoria elastica per la soppressione del disturbo di fase (jitter)nei sistemi di trasmissione per segnali digitali
DE2826053C2 (de) * 1978-06-12 1982-02-18 Heinrich-Hertz-Institut für Nachrichtentechnik Berlin GmbH, 1000 Berlin Verfahren und Schaltungsanordnung zur Regelung eines frei schwingenden Oszillators
DE2906200C3 (de) * 1979-02-17 1982-02-11 Philips Patentverwaltung Gmbh, 2000 Hamburg Synchronisieranordnung
US4274067A (en) * 1979-09-27 1981-06-16 Communications Satellite Corporation Universal clock recovery network for QPSK modems
JPS5686582A (en) * 1979-12-18 1981-07-14 Fuji Xerox Co Ltd Quantizing system at reception side for video information transmitter
US4330759A (en) * 1980-03-05 1982-05-18 Bell Telephone Laboratories, Incorporated Apparatus for generating synchronized timing pulses from binary data signals
FR2495865A1 (fr) * 1980-12-09 1982-06-11 Thomson Csf Dispositif de recuperation d'un signal d'horloge a partir d'un signal binaire et systeme de transmission, en particulier systeme a magnetoscope numerique, comportant un tel dispositif
US4400667A (en) * 1981-01-12 1983-08-23 Sangamo Weston, Inc. Phase tolerant bit synchronizer for digital signals
US4459558A (en) * 1981-10-26 1984-07-10 Rolm Corporation Phase locked loop having infinite gain at zero phase error
AT386094B (de) * 1984-10-12 1988-06-27 Schrack Elektronik Ag Schaltungsanordnung zum erfassen von abweichungen des synchronismus der ausgangssignale wenigstens zweier wechselspannungsquellen mittels einer messstufe
DE3937055A1 (de) * 1989-11-07 1991-05-08 Ant Nachrichtentech Takt-phasendetektor
WO1993018580A1 (en) * 1992-03-09 1993-09-16 Cabletron Systems, Inc. Digital phase locked loop for token ring networks
US5301196A (en) * 1992-03-16 1994-04-05 International Business Machines Corporation Half-speed clock recovery and demultiplexer circuit
DE4443790C1 (de) * 1994-12-08 1996-04-18 Sgs Thomson Microelectronics Verfahren und Vorrichtung zur Phasensynchronisation mit einem RDS-Signal
DE4444601C1 (de) * 1994-12-14 1996-07-11 Sgs Thomson Microelectronics Verfahren und Vorrichtung zur empfängerseitigen RDS-Phasensynchronisation
DE4444602C1 (de) * 1994-12-14 1996-09-19 Sgs Thomson Microelectronics Verfahren zur Bewertung eines RDS-Signals
EP1402645A4 (en) * 2001-05-03 2006-08-23 Coreoptics Inc AMPLITUDE DETECTION FOR CONTROLLING THE TIME OF SAMPLING DECISION IN THE FORM OF A DATA STREAM
ATE304747T1 (de) * 2002-07-12 2005-09-15 Cit Alcatel Eingangsschaltung für einen multiplexer mit einem dll phasendetector
US7072431B2 (en) * 2002-10-30 2006-07-04 Visteon Global Technologies, Inc. Clock timing recovery using arbitrary sampling frequency

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3376517A (en) * 1965-12-21 1968-04-02 Gen Electric Co Ltd Automatic frequency control using voltage transitions of an input reference signal

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3141930A (en) * 1961-05-15 1964-07-21 Stelma Inc Digital signal synchronizer system
US3142802A (en) * 1962-07-03 1964-07-28 Telemetrics Inc Synchronous clock pulse generator
US3500226A (en) * 1968-05-17 1970-03-10 Bell Telephone Labor Inc Apparatus for reducing the static offset in a phase-locked oscillator
US3701039A (en) * 1968-10-28 1972-10-24 Ibm Random binary data signal frequency and phase compensation circuit
US3599110A (en) * 1970-03-31 1971-08-10 Ibm Self-clocking system having a variable frequency oscillator locked to leading edge of data and clock
US3602834A (en) * 1970-06-18 1971-08-31 Ibm Timing recovery circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3376517A (en) * 1965-12-21 1968-04-02 Gen Electric Co Ltd Automatic frequency control using voltage transitions of an input reference signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04260239A (ja) * 1991-02-15 1992-09-16 Nec Corp タイミング抽出回路

Also Published As

Publication number Publication date
DE2355470A1 (de) 1974-07-04
DE2355470C3 (de) 1981-10-01
IT998627B (it) 1976-02-20
CA1000368A (en) 1976-11-23
DE2355470B2 (de) 1980-10-23
FR2212702A1 (ja) 1974-07-26
GB1445725A (en) 1976-08-11
US3805180A (en) 1974-04-16
FR2212702B1 (ja) 1976-05-14
JPS5329448B2 (ja) 1978-08-21

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