JPS4973062A - - Google Patents
Info
- Publication number
- JPS4973062A JPS4973062A JP48090616A JP9061673A JPS4973062A JP S4973062 A JPS4973062 A JP S4973062A JP 48090616 A JP48090616 A JP 48090616A JP 9061673 A JP9061673 A JP 9061673A JP S4973062 A JPS4973062 A JP S4973062A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0372—Bistable circuits of the primary-secondary type
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US00293191A US3812388A (en) | 1972-09-28 | 1972-09-28 | Synchronized static mosfet latch |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4973062A true JPS4973062A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1974-07-15 |
| JPS5250671B2 JPS5250671B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-12-26 |
Family
ID=23128071
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48090616A Expired JPS5250671B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1972-09-28 | 1973-08-14 |
Country Status (7)
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55100734A (en) * | 1979-01-26 | 1980-07-31 | Hitachi Ltd | Output buffer circuit with latch function |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4995550A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1973-01-12 | 1974-09-10 | ||
| GB1543716A (en) * | 1975-03-11 | 1979-04-04 | Plessey Co Ltd | Injection logic arrangements |
| US4035663A (en) * | 1976-09-01 | 1977-07-12 | Rockwell International Corporation | Two phase clock synchronizing method and apparatus |
| US4072869A (en) * | 1976-12-10 | 1978-02-07 | Ncr Corporation | Hazard-free clocked master/slave flip-flop |
| US4224533A (en) * | 1978-08-07 | 1980-09-23 | Signetics Corporation | Edge triggered flip flop with multiple clocked functions |
| US4540903A (en) * | 1983-10-17 | 1985-09-10 | Storage Technology Partners | Scannable asynchronous/synchronous CMOS latch |
| EP0163175B1 (de) * | 1984-05-16 | 1990-08-29 | Siemens Aktiengesellschaft | Breitbandfrequenzteiler |
| US5034923A (en) * | 1987-09-10 | 1991-07-23 | Motorola, Inc. | Static RAM with soft defect detection |
| US5028814A (en) * | 1990-02-14 | 1991-07-02 | North American Philips Corporation | Low power master-slave S/R flip-flop circuit |
| NL9000544A (nl) * | 1990-03-09 | 1991-10-01 | Philips Nv | Schrijf-erkenningscircuit bevattende schrijfdetector en bistabiel element voor vier-fase hand-shake signalering. |
| JPH05232196A (ja) * | 1992-02-25 | 1993-09-07 | Mitsubishi Electric Corp | テスト回路 |
| US5576651A (en) * | 1995-05-22 | 1996-11-19 | International Business Machines Corporation | Static/dynamic flip-flop |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3624425A (en) * | 1965-07-09 | 1971-11-30 | Rca Corp | Capacitance multiplication network |
| GB1236069A (en) * | 1967-11-06 | 1971-06-16 | Hitachi Ltd | A bistable driving circuit |
| GB1256752A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1968-06-08 | 1971-12-15 | ||
| US3573507A (en) * | 1968-09-11 | 1971-04-06 | Northern Electric Co | Integrated mos transistor flip-flop circuit |
| US3610959A (en) * | 1969-06-16 | 1971-10-05 | Ibm | Direct-coupled trigger circuit |
| DE2047945A1 (de) * | 1970-09-29 | 1972-04-06 | Siemens Ag | Anordnung zur Erzielung von taktflankengesteuertem Verhalten bei taktzustands gesteuerten bistabilen Kippstufen |
-
1972
- 1972-09-28 US US00293191A patent/US3812388A/en not_active Expired - Lifetime
-
1973
- 1973-06-20 IT IT25606/73A patent/IT989306B/it active
- 1973-07-20 FR FR7326969A patent/FR2201584B1/fr not_active Expired
- 1973-08-14 JP JP48090616A patent/JPS5250671B2/ja not_active Expired
- 1973-08-31 GB GB4110873A patent/GB1414217A/en not_active Expired
- 1973-09-15 DE DE2346568A patent/DE2346568C3/de not_active Expired
- 1973-09-18 CA CA181,281A patent/CA1000369A/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55100734A (en) * | 1979-01-26 | 1980-07-31 | Hitachi Ltd | Output buffer circuit with latch function |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1414217A (en) | 1975-11-19 |
| JPS5250671B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-12-26 |
| IT989306B (it) | 1975-05-20 |
| FR2201584A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1974-04-26 |
| US3812388A (en) | 1974-05-21 |
| CA1000369A (en) | 1976-11-23 |
| DE2346568B2 (de) | 1980-11-27 |
| DE2346568A1 (de) | 1974-04-11 |
| FR2201584B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1976-05-07 |
| DE2346568C3 (de) | 1981-09-10 |