JPS4950459A - - Google Patents

Info

Publication number
JPS4950459A
JPS4950459A JP9369272A JP9369272A JPS4950459A JP S4950459 A JPS4950459 A JP S4950459A JP 9369272 A JP9369272 A JP 9369272A JP 9369272 A JP9369272 A JP 9369272A JP S4950459 A JPS4950459 A JP S4950459A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9369272A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9369272A priority Critical patent/JPS4950459A/ja
Publication of JPS4950459A publication Critical patent/JPS4950459A/ja
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP9369272A 1972-09-20 1972-09-20 Pending JPS4950459A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9369272A JPS4950459A (ja) 1972-09-20 1972-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9369272A JPS4950459A (ja) 1972-09-20 1972-09-20

Publications (1)

Publication Number Publication Date
JPS4950459A true JPS4950459A (ja) 1974-05-16

Family

ID=14089442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9369272A Pending JPS4950459A (ja) 1972-09-20 1972-09-20

Country Status (1)

Country Link
JP (1) JPS4950459A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51125253U (ja) * 1975-04-01 1976-10-09
JPS57120398A (en) * 1981-01-19 1982-07-27 Sanyo Electric Co Method of connecting both-side printed foil of both-side printed circuit board
JPS60208894A (ja) * 1984-04-03 1985-10-21 カシオ計算機株式会社 フレキシブル基板の製造方法
JPS60208888A (ja) * 1984-04-03 1985-10-21 カシオ計算機株式会社 フレキシブル基板の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51125253U (ja) * 1975-04-01 1976-10-09
JPS57120398A (en) * 1981-01-19 1982-07-27 Sanyo Electric Co Method of connecting both-side printed foil of both-side printed circuit board
JPS6347157B2 (ja) * 1981-01-19 1988-09-20 Sanyo Electric Co
JPS60208894A (ja) * 1984-04-03 1985-10-21 カシオ計算機株式会社 フレキシブル基板の製造方法
JPS60208888A (ja) * 1984-04-03 1985-10-21 カシオ計算機株式会社 フレキシブル基板の製造方法
JPH0434319B2 (ja) * 1984-04-03 1992-06-05 Casio Computer Co Ltd
JPH0434320B2 (ja) * 1984-04-03 1992-06-05 Casio Computer Co Ltd

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