JPH1197466A - Package method of ic chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make fixing and dividing process of a sealing frame easy, by making a sealing frame for resin sealing of a plurality of IC chips integral, supplying sealing resin and thermally hardening it, and thereafter removing a sealing frame and dividing respective electronic part. SOLUTION: An IC chip is subjected to die bonding to a PCB substrate 11. A bonding pad of an IC chip and a pad formed in the PCB substrate 11 are connected by a wire. Then, a sealing frame 15 is fixed by adhesion. The sealing frame 15 for 12 pieces of IC chips is formed integral and 12 pieces of holes are formed. A recessed part formed of the PCB substrate 11 and the sealing frame 15 is filled of potting resin for protecting an IC chip and a bonded wire and is thermally hardened. Then, the IC chips an cut out along an inner circumference of a hole of the sealing frame 15 and 12 pieces of packages are completed. As a result, a sealing frame can be readily fixed, fixing precision is improved and a division process is made easy.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for packaging an IC chip.

[0002]

2. Description of the Related Art As a package of an IC chip, a lead insertion type in which an IC chip is mounted on a lead frame and molded with a resin is mainly used, but with the spread of surface mounting, many packages have been developed. SOP, QFP, BGA,
Although CSP and the like are typical, the present invention relates to BGA, C
This is an IC chip packaging method suitable for SP.

A QFP (Quad Flat Pack package) is a peripheral terminal type multi-terminal package, and an area array terminal type BGA (Ball Gripper) is further provided as a multi-terminal type package.
d Array), miniaturized CSP (Chip Size Packag)
e, Chip Scale Package) has been put to practical use.

Conventional area array terminal type IC
A chip packaging method will be described. Figure 1 is a PC
FIG. 3 is a perspective view of a B substrate 1. In the figure, twelve corners 2 are positions where a bare chip is mounted, and wiring formed on the PCB substrate 1 is omitted. FIG. 2 is a perspective view in which the IC chip 3 is mounted (die bonding). IC chip 3
And the pads (both not shown) formed on the PCB substrate 1 are connected by wire bonding. FIG. 3 is a perspective view in which the sealing frame 4 is fixed by bonding. The sealing frame 4 is for reducing the size of the package.

FIG. 8 is a sectional view taken along line AA of FIG. 3 in which the PCB substrate of FIG. 3 is set on a cutting jig. A pedestal 6 is fixed to the upper surface of the cutting jig 5, and the lower surface of the PCB substrate 1 is bonded to the upper surface of the pedestal 6 with an adhesive 9. A concave portion formed by the PCB substrate 1 and the sealing frame 4 is filled with a potting resin 8 for protecting the wire 7 bonded to the IC chip 3 and subjected to a thermosetting treatment. FIG. 9 is an AA sectional view after cutting. By cutting along the outer periphery of the sealing frame 4 with a cutter, 12 packages are completed. 10 is a cutting groove.

[0006]

Since the sealing frame 4 is used for each IC chip, the cost is high including the time and labor required for bonding and fixing. (Although there is a method to replace the sealing frame with barrier printing to prevent the flow of the potting resin without using the sealing frame, the outer periphery of the potting resin becomes a slope, so the potting resin is used to protect the wire. ), And as a result, the size of the package is increased, and the height of the potting resin is apt to vary, so that the package becomes thicker on average.)

[0007] The presence of the sealing frame hinders miniaturization of the package.

[0008]

A step of mounting a plurality of IC chips on a multi-chip substrate, a step of mounting a sealing frame for resin-sealing the plurality of IC chips, and a sealing resin And heat curing, and individual electronic components (IC
In the method of packaging an IC chip having a step of dividing the package into packages, the sealing frame is integrated.

[0009] The sealing frame is removed in the step of dividing into individual electronic components.

A laser beam is used for the division.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. FIG. 4 is a perspective view of a PCB substrate according to the present invention. A corner 12 in the figure is a position where a bare chip is mounted. The area 14 is an area for wire bonding, and although not shown, a large number of terminals are gathered. FIG. 5 is a perspective view in which the IC chip 3 is die-bonded. FIG. 6 is a perspective view in which one of the IC chips 3 is wire-bonded. The bonding pads of the IC chip 3 and the pads (both not shown) formed on the PCB substrate 11 are connected by wires 7. FIG. 7 is a perspective view in which the sealing frame 15 is fixed by bonding. The sealing frames for the 12 IC chips are integrally formed and have 12 holes.

FIG. 10 is a sectional view taken along the line BB of FIG. 7 in which the PCB 11 is set on a cutting jig. A pedestal 17 is fixed to the upper surface of the cutting jig 16, and the lower surface of the PCB substrate 11 is bonded to the upper surface of the pedestal 17 with an adhesive 18. The recess formed by the PCB substrate 11 and the sealing frame 15 is filled with a potting resin 8 for protecting the wires 7 bonded to the IC chip 3 and subjected to a heat effect treatment. FIG.
FIG. 7 is a sectional view taken along line BB after cutting. By cutting along the inner periphery of the hole of the sealing frame 15 with a cutter, 12 packages are completed. 19 is a cutting groove.

FIG. 12 shows the completed IC package 20 as P
FIG. 4 is a perspective view of the CB substrate 11 as viewed from the back side, and an external shape indicated by a dashed line is an IC package according to the related art. It can be seen that the IC package of the present embodiment has achieved miniaturization.

In the above-described embodiment, the sealing frame is completely removed. However, if the center of each cross section of the sealing frame is cut, an IC package similar to the prior art having a sealing frame is provided. can do.

Although a dicing saw is generally used for the division, it must be cut and fixed to the pedestal with an adhesive or the like as described above. The sealing frame becomes disposable. In the case where the sealing frame is integrally formed as in the above-described embodiment and the inside of the sealing frame is cut out, it is effective to use a laser beam because the laser beam can be cut off one by one. Since it is not necessary to adhere to the pedestal only by fixing an appropriate place of the sealing frame, the step of attaching can be omitted. In the present invention, a carbon dioxide laser is effective.

If the cutting is performed while leaving the sealing frame, the sealing frame can be regenerated and resources can be saved.

[0017]

By integrating the sealing frame, the mounting of the sealing frame is facilitated and the mounting accuracy can be improved.

The cost of the sealing frame can be reduced as compared with the case where the sealing frames are used individually. Since the PCB substrate itself can be made small, it can be inexpensive.

Since the potting accuracy is improved by using a sealing frame and the sealing frame is removed after sealing, a small and stable IC package can be manufactured.

By using a laser beam for the division, the division step is facilitated, and the sealing frame can be regenerated, thereby saving resources.

[Brief description of the drawings]

FIG. 1 is a perspective view of a PCB substrate 1.

FIG. 2 is a perspective view in which an IC chip is mounted (die bonding).

FIG. 3 is a perspective view in which a sealing frame 4 is fixed by bonding.

FIG. 4 is a perspective view of a PCB substrate according to the present invention.

FIG. 5 is a perspective view in which an IC chip is die-bonded.

FIG. 6 is a perspective view of wire bonding to one of the IC chips.

FIG. 7 is a perspective view in which a sealing frame is fixed by bonding.

FIG. 8 is a view showing A- in which the PCB substrate of FIG. 3 is set in a cutting jig;
A sectional view

FIG. 9 is a sectional view taken along the line AA after cutting.

FIG. 10 is a sectional view taken along the line BB of FIG. 7 with the PCB substrate 11 set on a cutting jig;

FIG. 11 is a sectional view taken along the line BB after cutting;

FIG. 12 is a perspective view of the completed IC package viewed from the back side of the PCB substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 PCB board 2 Corner part 3 IC chip 4 Sealing frame 5 Cutting jig 6 Pedestal 7 Wire 8 Potting resin 9 Adhesive 10 Cutting groove 11 PCB board 12 Corner part 14 Wire bonding area 15 Sealing frame 16 Cutting jig 17 Pedestal 18 Adhesive 19 Cutting groove 20 Completed IC package

Claims (3)

[Claims] 1. A step of mounting a plurality of IC chips on a multi-chip substrate, a step of mounting a sealing frame for resin-sealing the plurality of IC chips, and a step of supplying a sealing resin to heat. A method for packaging an IC chip, comprising a step of curing and a step of dividing the electronic chip into individual electronic components (IC packages), wherein the sealing frame is integrated. 2. The method for packaging an IC chip according to claim 1, wherein the sealing frame is removed in the step of dividing into individual electronic components. 3. The method for packaging an IC chip according to claim 2, wherein a laser beam is used for the division.