JPH118409A - Led array, manufacture thereof and led printer head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To dispose p-side pad electrodes and n-side electrodes on the same side, with respect to a high-density light-emitting element array. SOLUTION: This device is provided with an array of light-emitting parts 13 of a p-type semiconductor layer formed at an n-type semiconductor block 11, a layer insulation film 12 having n-side openings 87 formed on the block 11, pad electrodes 84a of p-side electrodes 84 formed thereon which are connected to the emitting parts 13, via holes 21 formed through a layer insulation film 18, through which specified p-side electrodes 84 are connected to a p-side matrix wiring 4, n-side electrodes 84 which are formed in n-side openings 87 on the same side as n-side pad electrodes 84b to the emitting parts 13 and connected to the block 11 in the openings 87. Connections of the electrodes 85 with respect to the block 11 are provided at the same side as the pad electrodes 84, thus eliminating the need for forming wiring between the emitting parts 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED array in which a plurality of LEDs (light emitting diodes) are formed on the same semiconductor substrate, a method of manufacturing the same, and an LED printer head formed using the LED array, and in particular, 1200 [DPI].
([Dot / Inch]) The present invention relates to an LED array capable of supporting a high density.

[0002]

2. Description of the Related Art An LED array is an exposure light source for a photosensitive drum in an electrophotographic printer, and is used for a printer head or the like. FIG. 27 is a top view showing an example of the structure of a conventional LED array. The LED array shown in FIG.
This is an LED array corresponding to 00 [DPI], and has a high resistance semiconductor substrate 102 at the bottom and a separation groove 103 formed at the side.
A plurality of LEDs are formed on a plurality of n-type semiconductor blocks 111 which are separated from each other. The n-type semiconductor block 111 includes a plurality of p-type semiconductor layers (light emitting portions) 113, a p-side electrode 114 individually connected to the p-type semiconductor layer 113, and an n-side contact electrode 115a connected to the n-type semiconductor block 111. And an n-side pad electrode 115b connected to the n-side contact electrode 115a.

[0003] Of the plurality of p-side electrodes 114 in the block, a predetermined p-side electrode 114 has a p-side pad electrode 114b.
Are integrally formed. The n-side electrode 115 composed of the n-side contact electrode 115a and the n-side pad electrode 115b having a laminated structure is used for a plurality of LEDs 110 in the block.
Are common electrodes. Between the n-type semiconductor block 111 and the p-side electrode 114 and the n-side pad electrode 115b,
A first interlayer insulating film 112 is formed. The first interlayer insulating film 112 has a p-side opening 116 and an n-side opening 117. The p-side electrode 114 is connected to the p-side opening 11.
6 is connected to the semiconductor layer 113. The n-side contact electrode 115a is formed in the n-side opening 117.

In the LED 110, when a voltage is applied between the p-side electrode 114 and the n-side electrode 115, a light-emitting phenomenon occurs at the junction surface between the n-type semiconductor block 111 and the p-type semiconductor layer 113, and this emitted light is p-type. The radiation is emitted from the surface of the semiconductor layer 113 to the outside. The p-side electrode 114 is formed of an aluminum (Al) film or an Al alloy film, and the n-side electrode 115 is formed of a gold (Au) film or an Au alloy film. Further, a p-side matrix wiring 104 connected to the predetermined p-side electrode 114 between the blocks at the via hole 121 is formed, and the p-side electrode 114 having no p-side pad electrode 114b is connected to another p-side electrode 114 by the p-side matrix wiring 104. It is connected to the p-side electrode 114 having the p-side pad electrode 114b of the n-type semiconductor block 111. p-side matrix wiring 1
04 and the p-side electrode 114, a second interlayer insulating film 118
Are formed. Note that, as in the LED array shown in FIG. 27, an LED array having a structure in which a plurality of semiconductor blocks separated from each other are arranged in a line and a matrix wiring is provided between different semiconductor blocks is referred to as a matrix type LE.
It is called a D array.

Further, the present inventors have proposed an LED array having an n-side electrode structure shown in FIG. 28 in order to simplify the manufacturing process and improve the reliability of the n-side contact electrode. In FIG. 28, (a) is a top view,
(B) is a cross-sectional view along AA 'in (a). The LED array 101 shown in FIG.
An n-side electrode 125 having a single-layer structure is formed in the n-side opening 127, and the entire n-side electrode 125 is used as an n-side pad electrode for connecting to an external circuit.
This is a structure in which side pad electrodes are connected to an n-type semiconductor block 111. FIG. 29 is a cross-sectional view showing a structure when the LED array 101 is mounted on a printer head. FIG.
, The p-side pad electrode 114 of the LED array 101
b is bonded to the driving IC 201 by the Au wire 203a, and the n-side electrode 125 is connected to the Au wire 20a.
3b is bonded to the block ground 202. The block ground 202 is connected to the LED array 10
This is a ground (ground potential) separated for each n-type semiconductor block 111. The drive IC 201 and the block ground 202 constitute a drive circuit for driving the LED array 101.

In the LED arrays shown in FIGS. 27 and 28, an n-side opening 127 (117) and an n-side electrode 1
25 (n-side contact electrode 115 a) is formed near the p-type semiconductor layer 113, and includes the n-side electrode 125 (n-side pad electrode 115 b) and the p-side pad electrode 11 of the p-side electrode 114.
4b are formed on opposite sides of the p-type semiconductor layer (light emitting portion) 113. On the other hand, as shown in FIG. 30, the p-side pad electrode 114b and the n-side pad electrode 115b
Are formed on the same side with respect to the p-type semiconductor layer 113. The n-side contact electrode 115a of the LED array shown in FIG. 30 is connected to the n-type semiconductor block 111 near the p-type semiconductor layer 113 opposite to the p-side pad electrode 114b with respect to the p-type semiconductor layer 113, as in FIG. In this connection, the n-side pad electrode 115b is routed from between the p-type semiconductor layers 113 to the p-side pad electrode 114b.

[0007]

However, FIG.
In the LED array shown in FIG. 28, the p-side pad electrode and the n-side electrode (n-side pad electrode)
Since they are arranged on the opposite sides to the mold semiconductor layer (light emitting portion), when mounting on the printer head, wires for bonding to the drive circuit must be pulled out from both sides of the LED array as shown in FIG. I had to.

In the LED array shown in FIG. 30, the p-side pad electrode and the n-side electrode are arranged on the same side with respect to the light emitting portion. It can be pulled out from one side, and the chip width size of the LED array can be reduced. However, in the LED array corresponding to 1200 [DPI], the pitch dimension of the p-type semiconductor layer is about 21 [μm], and the interval between the p-type semiconductor layers is as narrow as about 13 [μm]. When an attempt is made to form a wiring for leading an electrode, there is a risk that the wiring and the p-type semiconductor layer may come into contact with each other. Therefore, the structure shown in FIG.
It is difficult to manufacture a high-density LED array of [DPI] or more.

The present invention is an improvement over the prior art, in which an LED in which a p-side pad electrode and an n-side electrode can be arranged on the same side with respect to a light emitting portion array formed at a high density.
It is intended to provide an array. It is another object of the present invention to reduce the chip width of an LED array in which light emitting portions are formed at high density.

[0010]

In order to achieve the above object, an LED array according to the present invention comprises a first conductive type semiconductor substrate and a second conductive type semiconductor layer formed on the surface substrate side. (The above integers) light emitting portions are formed in a line, and a first conductive side electrode serving as a pad electrode for connecting the semiconductor substrate to an external circuit is formed on the surface of the semiconductor substrate, and the light emitting portion is individually formed. An LED array having N second conductive side electrodes to be connected, wherein at least one of the N second conductive side electrodes has a second conductive side pad electrode for connecting to an external circuit; A conductive side electrode is formed on the same side as the second conductive side pad electrode with respect to the light emitting unit row;
The semiconductor device is characterized in that it is connected to the semiconductor substrate on the same side as the second conductive side pad electrode.

[0011] More specifically, L
As the ED array, for example, a plurality of semiconductor blocks, each of which is separated from each other and made of the first conductive type semiconductor substrate on which the light emitting unit, the first conductive side electrode, and the second conductive side electrode are formed, are arranged in a row. Matrix-type LE which is arranged in a matrix and forms a matrix wiring connecting predetermined second conductive side electrodes respectively formed in different semiconductor blocks.
There is a D array.

Further, in the method of manufacturing an LED array according to the present invention, the light-emitting portion row or the light-emitting portion row formation region is on the same side as the second conductive side pad electrode or the second conductive side pad electrode formation region. A conductive film to be the first conductive side electrode is formed on the surface of the semiconductor substrate where the surface in the region where the first conductive side electrode is to be formed is set, and the conductive film is patterned. A step of forming one conductive side electrode is performed.

Further, the LED printer head of the present invention comprises:
The above-mentioned LED array, and a drive circuit for driving this LED array, wherein the wire bonded to the first conductive side electrode and the wire bonded to the second conductive side pad electrode are connected to the first conductive side electrode. A wire bonded to a side electrode and a wire bonded to the second conductive side pad electrode are drawn out from one side of the LED array and bonded to the drive circuit.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment FIGS. 1A and 1B are diagrams showing a structure of an LED array 1 according to a first embodiment of the present invention, wherein FIG. 1A is a top view and FIG. 1B is a cross section taken along line AA ′ in FIG. FIG. The LED array 1 includes an n-type semiconductor block 1 arranged in a row on a semiconductor substrate 2.
1, 1200 [D]
{I] corresponding LED array. The semiconductor substrate 2 is obtained by forming an n-type semiconductor substrate 2a such as an epitaxial layer on a high-resistance semiconductor substrate 2b. The n-type semiconductor block 11 is obtained by dividing the n-type semiconductor substrate 2a. The n-type semiconductor block 11 is electrically separated from the high-resistance semiconductor substrate 2b by a separation groove (etching groove) 3. The LED array 1 has a first conductivity type of n.
It is a matrix type LED array having a p-type and a second conductivity type.

In the n-type semiconductor block 11, N
(N is a positive integer) LEDs 10 are formed. In FIG. 1, N = 3. In the n-type semiconductor block 11,
N light-emitting portions 13 composed of a p-type semiconductor layer (p-type semiconductor region) formed by a diffusion method or the like are formed in a line. On the n-type semiconductor block 11, a first interlayer insulating film 12 is formed. The first interlayer insulating film 12 includes a light emitting portion 13
A first opening 16a for exposing substantially the entire surface of the n-type semiconductor block 11 and an n-side opening 17 for exposing the surface of the n-type semiconductor block 11 are formed.

On the surface of the n-type semiconductor block 11 on which the first interlayer insulating film 12 is formed, N p-side electrodes 14 are provided.
An n-side electrode 15 is formed. The p-side electrode 14 is individually connected to the light emitting unit 13 at the first opening 16a. At least one of the N p-side electrodes 14 is integrally formed with a p-side pad electrode 14b for connecting to an external circuit. In FIG. 1, a p-side electrode having a p-side pad electrode 14b is formed.
Two side electrodes 14 are formed, and one p-side electrode 14 having no p-side pad electrode 14b is formed. The N p-side electrodes 14 are formed on the same side of the row of the light emitting units 13 (below the row of the light emitting units 13 in FIG. 1). The n-side electrode 15 is formed in the n-side opening 17 and serves as a pad electrode for connecting the n-type semiconductor block 11 to an external circuit (for example, a drive circuit). This n-side electrode 15 has n
Ohmic connection is made to the n-type semiconductor block 11 in the side opening 17b. The n-side electrode 15 and the n-side opening 17 are connected to the p-side pad electrode 14 b
It is formed on the same side as. In FIG. 1, both the p-side pad electrode 14b and the n-side electrode 15
Is formed under the column. The n-side electrode 15 is
It is formed below the p-side pad electrode 14b. In addition,
The planar shapes of the n-side electrode 15 and the n-side opening 17 are not limited to the squares shown in FIG.

As described above, in the LED array 1, the n-side electrode 15 is formed on the same side as the p-side pad electrode 14b with respect to the row of the light emitting portions 13, and the n-side electrode 15 is formed on the same side as the p-side pad electrode 14b. Is different from the conventional LED array in that it is connected to the semiconductor block 11. Thereby, even if the row of the light emitting units 13 is formed at a high density of 1200 [DPI], the p-side pad electrode 14
The b and the n-side electrode 15 can be formed on the same side.
Therefore, the wire bonded to the p-side pad electrode 14b and the wire bonded to the n-side electrode 15 can be pulled out from one side of the LED array 1.
In FIG. 1, both of the above wires can be pulled out from the lower side of the LED array 1, that is, from the end face 22 side. Since the p-side pad electrode 14b and the n-side electrode 15 are formed on the end face 22 side of the two end faces 22 and 23 in the longitudinal direction of the LED array 1,
The end face 22 is referred to as an electrode-side end face. On the other hand, the end face 23
The light emitting portion 13 is formed on the side of
Is referred to as a light emitting unit side end face. Note that the n-side electrode 15 is formed not apart from the vicinity of the light emitting part 13 but at a distance from the light emitting part 13.
The light emission characteristics of the ED array 1 have already been confirmed by the inventors of the present application, and are excellent light emission characteristics similar to those of the conventional LED array.

On the first interlayer insulating film 12, the p-side electrode 14, and the n-side electrode 15, a second interlayer insulating film 18 is formed. The second interlayer insulating film 18 has a first opening 16
a opening 16b for exposing substantially the entire region of a, a p-side pad opening 19 for exposing the p-side pad electrode 14b,
an n-side pad opening 20 for exposing the n-side electrode 15;
A via hole 21 exposing the side electrode 14 is formed. The first opening 16a and the second opening 16b are defined by p
The side opening 16 is formed. Also, the second interlayer insulating film 1
On M, M (M is an integer equal to or greater than N) p-side matrix wirings 4 are formed. In the LED array 1 of FIG. 1, M = 9. The p-side matrix wiring 4 is formed over all the n-type semiconductor blocks 11,
The via hole 21 is connected to the p-side electrode 14.

The LED 10 includes an n-type semiconductor block 11 common to the N LEDs 10 and the n-type semiconductor block 1.
1, a light-emitting portion 13 individually formed on the light-emitting portion 13, a p-side electrode 14 individually formed on the light-emitting portion 13, and an n-type semiconductor block 11.
And an n-side electrode 15 commonly formed for the N LEDs 10 in the LED. The depth dimension of the light emitting section (p-type semiconductor layer) 13 is smaller than the thickness dimension of the n-type semiconductor block 11. Therefore, the light emitting section 13 is provided in the n-type semiconductor block 1.
1 is formed in a floating island shape. When a voltage is applied between the p-side electrode 14 and the n-side electrode 15, a light-emitting phenomenon occurs at the joint surface between the light-emitting portion 13 and the n-type semiconductor block 11, and this light is emitted from the surface of the light-emitting portion 13 to the outside. You. That is, as shown in FIG. 1B, the emitted light is emitted upward from the light emitting unit 13 in the vertical direction.

The manufacturing process of the LED array 1 according to the first embodiment shown in FIG. 1 will be described below. FIG. 2 to FIG.
FIG. 4 is a diagram illustrating an example of a manufacturing process of the ED array 1. In each of the drawings, (a) is a top view, and (b) is a cross-sectional view along AA ′ in (a). FIG.
FIG. 9C is a cross-sectional view taken along the line BB ′ in FIG.

First, as shown in FIG. 2, a semiconductor substrate 2 having an n-type semiconductor substrate 2a on a high-resistance semiconductor substrate 2b is manufactured. Here, a semi-insulating gallium arsenide substrate (GaAs substrate) is used as the high-resistance semiconductor substrate 2b. On this semi-insulating GaAs substrate, an n-type AlGaAs
The s layer is epitaxially grown, and this AlGaAs epitaxial layer is used as an n-type semiconductor substrate 2a. The thickness of the n-type semiconductor substrate 2a (n-type epitaxial layer) is, for example, about 3 [μm].

Next, as shown in FIG.
A first interlayer insulating film 12 serving as a diffusion mask 25 is formed on the surface of a, and the first opening 16a and the diffusion mask 25 are formed by patterning the first interlayer insulating film 12 by photolithography and etching. As the first interlayer insulating film 12 (diffusion mask 25), for example, a SiN film is used. This SiN film is formed by a CVD method, and has a thickness of, for example, about 500 to 3000 [Å]. Next, as shown in FIGS. 4 to 6, a p-type semiconductor layer (light emitting portion) 13 is formed on the surface substrate side of the n-type semiconductor substrate 2a. Where Z
The n solid phase diffusion method is used. That is, the Δn diffusion source film 26 is formed on the surface of the n-type semiconductor substrate 2a on which the first opening 16a has been formed, and the annealing cap film 27 is further formed thereon. The Ζn diffusion source film 26 is, for example, Z
An nO—SiO ₂ mixed film is formed. This ZnO-SiO
_{The two} mixed films are made of zinc oxide (ZnO) and silicon oxide (Si
O ₂₎ and a 1: film mixed in 1, is formed by sputtering. As the annealing cap film 27, for example, an aluminum nitride film (AlN
Film). The film thickness of the above-described ZnO-SiO ₂ mixed film, for example, about 500 to 3000 [Å], also the thickness of the above AlN film, for example, 500 to 3000 [Å]
It is about.

Subsequently, high-temperature annealing is performed on the n-type semiconductor substrate 2a on which the annealing cap film 27 has been formed,
(4) Zn is diffused from the n-diffusion source film 26 into the n-type semiconductor substrate 2a. In the first opening 16a, Zn diffuses into the n-type semiconductor substrate 2a, but in the region where the diffusion mask 25 is formed, Zn does not diffuse, so that Zn diffuses into the first opening 16a of the n-type semiconductor substrate 2a. A p-type semiconductor layer (light emitting portion) 13 is selectively formed in a corresponding region. The conditions of the high-temperature annealing are, for example, an annealing temperature of 700 [° C.] and an annealing time of 2 hours under a nitrogen atmospheric pressure.
By this annealing condition, the depth is about 1 [μm] and the surface Zn
P-type semiconductor layer (light emitting portion) 13 having a concentration of 10 ²⁰ [cm ³ ]
Is formed. Since the thickness of the n-type semiconductor substrate 2a is about 3 [μm] as described above, the depth of the p-type semiconductor layer is smaller than the thickness of the n-type semiconductor substrate 2a. The annealing cap film 27 prevents Zn from diffusing into the annealing atmosphere.

Next, as shown in FIG. 7, in the n-type semiconductor substrate 2a on which the light emitting portion 13 has been formed, the diffusion source film 26 and the annealing cap film 27 formed on the surface are entirely covered by, for example, a wet etching method. To remove only the first interlayer insulating film 12 (diffusion mask 25).

Next, as shown in FIG. 8, in the n-type semiconductor substrate 2a from which the diffusion source film 26 and the annealing cap film 27 have been removed, an n-side opening 17 is formed in the interlayer insulating film 12 by photolithography and etching. I do. The n-type opening 17 is formed in a region where the n-side electrode 15 is to be formed.
The n-type semiconductor substrate 2a in this region is exposed. The area where the n-side electrode 15 is to be formed is
(The row of the first openings 16a) is set on the same side as the area where the p-side pad electrode 14b is to be formed. FIG.
5A, a region where the p-side pad electrode 14b is to be formed;
The region in which the n-side electrode 15 is to be formed is both set below the row of the light emitting units 13, and thus the n-side opening 17 is
The light emitting section 13 is formed below the row.

Next, as shown in FIG. 9, a conductive film to be the p-side electrode 14 is formed on the surface of the n-type semiconductor substrate 2a on which the n-side opening 17 has been formed, and this conductive film is lifted off. The p-side electrode 14 is formed by patterning by the method. That is, a photoresist pattern is formed in which a region other than the region where the p-side electrode 14 is to be formed is a blank pattern, a conductive film serving as the p-side electrode 14 is formed on the entire surface, and the above-described photoresist and the film are formed thereon. The p-side electrode 14 having the p-side pad electrode 14b and the p-side electrode 1 having no p-side pad electrode 14b are lifted off by the lifted-off conductive film.
4 is formed. The p-side electrode 14 is formed such that a part thereof overlaps the surface of the light emitting unit 13 at the first opening 16a. As the conductive film to be the p-side electrode 14, for example, an Al film is used. Thereafter, a sintering process (heat treatment) for ohmic connection of the p-side electrode 14 to the light emitting unit 13 at the first opening 16a is performed.

Next, as shown in FIG. 10, a conductive film serving as the n-side electrode 15 is formed on the surface of the n-type semiconductor substrate 2a on which the p-side electrode 14 has been formed. To form an n-side electrode 15. The n-side electrode 15 is formed in the n-side opening 17 and is formed in close contact with the surface of the n-type semiconductor substrate 2a. after this,
A sintering process for ohmic connection of the n-side electrode 15 to the n-type semiconductor substrate 2a is performed. n-side contact electrode 1
As the conductive film that becomes 5, a conductive film that can be ohmic-connected to the n-type semiconductor substrate 2a, for example, an Au alloy film is used. As this Au alloy film, a titanium (Ti) film and a platinum (P
t) a laminated metal film of a film and an Au film, or an alloy film of Au, germanium (Ge), and nickel (Ni) and Au
A laminated alloy film (AuGeNi / Au film) with the film, or Α
and a laminated alloy film (ΑuGe / Ni / Au film) of a u and Ge alloy film, a Ni film, and an Au film. n-side electrode 15
Are formed on the same side as the p-side pad electrode 14b with respect to the row of the light emitting sections 13 (the row of the first openings 16a).
In FIG. 10A, the p-side pad electrode 14b and the n-side electrode 1
5 are both formed below the row of the light emitting units 13. The n-side electrode 15 is formed below the p-side pad electrode 14b.

As described above, in the manufacturing process of the LED array 1, the n-side electrode 15 is formed in the formation area where the n-side electrode 15 is set on the same side as the p-side pad electrode 14 b with respect to the row of the light emitting section 13.
A conventional LE is that the formed n-side electrode 15 is connected to the semiconductor block 11 on the same side as the p-side pad electrode 14b.
This is different from the D array manufacturing process. Thereby, the light emitting unit 1
3 is formed at a high density of 1200 [DPI], the p-side pad electrode 14 b
And the n-side electrode 15 can be formed on the same side.

The process shown in FIG. 9 and the process shown in FIG. 10 may be combined to form the n-side electrode 15 and the p-side electrode 14 at the same time. That is, a conductive film to be the n-side electrode 15 and the p-side electrode 14 is formed on the surface of the n-type semiconductor substrate 2a on which the n-side opening 17 has been formed, and the conductive film is patterned by a lift-off method. Is also good. However, in this case, the n-type semiconductor substrate 2a is used as the conductive film.
It is necessary to use a conductive film that can make ohmic contact with both the p-type semiconductor layer (light emitting portion) 13 and an Au alloy film. Thus, the n-side electrode 15 and the p-side electrode 1
Simultaneously forming the step 4 and the step of forming the conductive film and the step of patterning the conductive film can be reduced by one, so that the steps can be simplified.

Next, as shown in FIG. 11, the high-resistance semiconductor substrate 2 is formed on the n-type semiconductor substrate 2a on which the n-side electrode 15 has been formed.
The n-type semiconductor substrate 2a is divided into the n-type semiconductor blocks 11 by forming the separation groove 3 reaching to "b". In other words, the first region in the region where the isolation groove is to be formed by photolithography and etching
The interlayer insulating film 12 and the n-type semiconductor substrate 2a thereunder are etched to expose the high-resistance semiconductor substrate 11b. Thereby, the n-type semiconductor block 11 is separated from each other by the separation groove 3 and the high-resistance semiconductor substrate 2b. N-type semiconductor block 11 having a thickness of about 3 [μm]
(N-type semiconductor substrate 2a) and film thickness of 500 to 3000
For the first interlayer insulating film 12 of [Å], the depth of the isolation groove 3 is, for example, about 3.5 [μm]. The width of the separation groove 3 is limited by the interval between the light emitting units 13. 1200
In the [DPI] LED array, the pitch dimension of the light emitting units 13 is about 21 [μm], and when the width of the light emitting units 13 is about 8 [μm], the width of the separation groove 3 is less than 13 [μm]. There must be.

Next, as shown in FIG. 12, a second interlayer insulating film 18 is formed on the surface of the semiconductor substrate 2 on which the isolation trench 3 has been formed.
Are formed in the second interlayer insulating film 18, a second opening 16b opening substantially the same area as the first opening 16a, a p-side pad opening 19 opening the p-side pad electrode 14b,
An n-side pad opening 20 for opening the n-side electrode 15 and a via hole 21 reaching the p-side electrode 14 are formed. As the second interlayer insulating film 18, for example, a polyimide film is used.
The polyimide film is formed and patterned as follows using, for example, polyimide dissolved in a photoresist developing solution (alkaline solution). A polyimide source is spin-coated on the semiconductor substrate 2 (wafer) and prebaked at about 100 ° C. Next, a photoresist is spin-coated on the pre-baked polyimide film, and this photoresist is exposed so that the opening and the via hole 21 are formed into a pattern. During the development of the photoresist, the polyimide film region where the resist is not formed is also removed, and the polyimide film is patterned. Next, the remaining resist is removed, and the patterned polyimide film is baked at about 350 ° C.

Finally, as shown in FIG. 13, the entire surface of the semiconductor substrate 2 on which the second interlayer insulating film 18 has been patterned is p-type.
A conductive film to be the side matrix wiring 4 is formed, and the conductive film is patterned by a lift-off method to form the p-side matrix wiring 4. Thereafter, a sintering process is performed to make ohmic connection of the p-side matrix wiring 4 to the p-side electrode 14 in the via hole 21. As the conductive film to be the p-type matrix wiring 4, for example, an Al film is used when Al is used for the p-side electrode 14, and an Au film is used when an Au alloy is used.
An alloy film is used. As described above, the LED shown in FIG.
Array 1 is manufactured.

FIG. 14 shows an LED according to the first embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a structure when the array 1 is mounted on a printer head. The printer head shown in FIG.
It has an array 1 and a drive circuit for driving the LED array 1. The above driving circuit has a driving IC 201 and a block ground 202. The p-side pad electrode 14b of the LED array 1 is connected to the drive IC 20 by an Au wire 203a.
1 and the n-side electrode 15 is bonded to the block ground 202 by an Au wire 203b. The printer head shown in FIG.
A wire 203a bonded to the p-side pad electrode 14b and a wire 203b bonded to the n-side electrode 15 are drawn out from one side of the LED array 1 having a high density of 0 [DPI]. is there. That is, the wire is drawn out only from the electrode side end face 22 side of the LED array 1, and the wire is not drawn out from the light emitting part side end face 23 side.

As described above, by configuring the printer head using the LED array 1, even if the LED array has a high density, the wires can be drawn out from one side of the LED array. it can. In addition, since mounting can be performed more easily than when wires are drawn out from both sides of the LED array, mounting costs can be reduced.

Next, the operation of the LED array 1 will be briefly described. The n-type semiconductor blocks 11 are denoted by 11-1, 11-2, 11-3,... from the right side of FIG. Also, n
In the semiconductor block 11, the LEDs 10 are 10-1, 10-2, and 10-3 in order from the right side in FIG. 1, and the p-side electrodes 14 are 14-1, 14-2, and 1 in order from the right side in FIG.
4-3. Further, the p-side matrix wirings 4 are 4-1, 4-2,..., 4-9 in order from the lower side in FIG.

In the n-type semiconductor block 11-1, p
The side electrode 14-1 is connected to the p-side matrix wiring 4-1.
The p-side electrode 14-2 is connected to the p-side matrix wiring 4-2, and the p-side electrode 14-3 is connected to the p-side matrix wiring 4-3.
Connected to In the n-type semiconductor block 11-2, the p-side electrode 14-1 is connected to the p-side matrix wiring 4-4, and in the n-type semiconductor block 11-3, the p-side electrode 14-1 is connected to the p-side matrix wiring 4-7. Connected.
Further, in an n-type semiconductor block 11-4 (not shown), similarly to the n-type semiconductor block 11-1, the p-side electrode 14-1 is connected to the p-side matrix wiring 4-1 and the p-side electrode 14-2 is connected to It is connected to the p-side matrix wiring 4-2, and the p-side electrode 14-3 is connected to the p-side matrix wiring 4-3.

In n-type semiconductor blocks 11-1 to 11-3, p-side electrodes 14-1 and 14-2 have p-side pad electrodes 14b. In n-type semiconductor blocks 11-4 to 11-6 (not shown), p-side electrodes 14-2 and 14-3 have p-side pad electrodes 14b, and in n-type semiconductor blocks 11-7 to 11-9 (not shown). Is p
Side electrodes 14-1 and 14-3 are p-side pad electrodes 14b
Having.

For example, L of the n-type semiconductor block 11-1
To turn on the ED 10-1, the n-type semiconductor block 1
1-1 p-side electrode 14-1 (the p-side pad electrode 14b
-1) and the n-side electrode 15 of the n-type semiconductor block 11-1
(The n-side pad electrode 15b). At this time, an n-type semiconductor block 11-4 (not shown)
If the LED 10-1 is turned on simultaneously, the n-side electrode 15 of the n-type semiconductor block 11-4 may be set to the same potential as the n-side electrode 15 of the n-type semiconductor block 11-1. This is because the p-side electrode 14-1 of the n-type semiconductor block 11-4 is connected to the p-side electrode 14-1 of the n-type semiconductor block 11-1 by the p-side matrix wiring 4-1. . LED of n-type semiconductor block 11-1
If the LED 10-1 of the n-type semiconductor block 11-4 is turned off while the light 10-1 is turned on, then n
The n-side electrode 15 of the type semiconductor block 11-4 may be opened. Also, the LED 1 of the n-type semiconductor block 11-1
To turn on 0-3, the p-side electrode 14 of another n-type semiconductor block 11 connected to the p-side matrix wiring 4-3 and having the p-side pad electrode 14b, for example, n (not shown)
A voltage may be applied between the p-side pad electrode 14b of the p-side electrode 14-3 of the type semiconductor block 11-4 and the n-side electrode 15 of the n-type semiconductor block 11-1.

As described above, according to the first embodiment, the n-side electrode 15 is connected to the p-side pad electrode 14
By forming the n-side electrode 15p on the same side as the p-side pad electrode 14b by forming the n-side electrode 15p on the same side as the p-side pad electrode 14b by forming the n-side electrode 15p on the same side as the p-side pad electrode 14b. Can be realized. Also,
By configuring the printer head using this high-density LED array, the bonding wires can be pulled out from one side of the LED array, so that the head size of the printer head can be reduced. Also, since the mounting operation is facilitated, the mounting cost can be reduced.

Second Embodiment By applying the above-described first embodiment in which an n-side electrode and a p-side pad electrode are arranged on the same side with respect to a light-emitting portion row, light is emitted in a horizontal direction from the end face of the LED array. An edge-emitting LED array that emits light to the LED can be realized. In addition,
In contrast to the edge emission type, the LED array of FIG. 1 is referred to as a top emission type. In the edge-emitting LED array, the p-side electrode can be formed over the entire surface of the light-emitting portion (p-type semiconductor layer), so that the connection area between the light-emitting portion and the p-side electrode can be increased. There is a feature that the threshold voltage can be made smaller than that of the top emission type LED array.

FIG. 15 shows an LED according to a second embodiment of the present invention.
It is a figure which shows the structure of the array 31, (a) is a top view,
(B) is a cross-sectional view along AA 'in (a). In FIG. 15, the same components as those in FIG. 1 are denoted by the same reference numerals. The LED array 31 is an edge-emitting LED array, and the LED array 1 of FIG.
3 is a light emitting unit 43, and the p-side opening 16 is a p-side opening 46.

The light emitting section (p-type semiconductor layer) 43 is formed close to the light emitting section side end surface 23 of the n-type semiconductor block 11 (n-type semiconductor substrate 2a). The p-type opening 46 is the first type.
This is provided in the interlayer insulating film 12, and corresponds to the first opening 16a in FIG. The surface of the light emitting section 43 in the opening 46 is entirely covered with the p-side electrode 14. It is not necessary to provide an opening corresponding to the second opening 16b in FIG. 1 in the second interlayer insulating film 18. LED
In 31, the emitted light is emitted from the light emitting unit side end face 23. That is, in FIG. 15B, the light is emitted rightward in the horizontal direction. The light-emitting characteristics of the edge-emitting LED array 31 have already been confirmed by the inventors of the present application, and are excellent light-emitting characteristics similar to those of the conventional LED array. The manufacturing process of the LED 31 is basically the same as that of the first embodiment. However, a step of processing the light emitting unit side end surface 23 may be added. LED array 3
The operation of the LED array 1 is the same as that of the LED array 1 of the first embodiment except that the emitted light is emitted from the light emitting unit side end face.

As described above, the n-side electrode 15 and the p-side pad electrode 14b are formed on the same side with respect to the light-emitting portion 43, and the light-emitting portion (p-type semiconductor layer) 43 is located close to the light-emitting portion side end face 23. By forming the LED array 31, it is possible to manufacture the edge emitting LED array 31 in which the rows of the light emitting units 43 are formed at a high density. In addition, since the LED array 31 is of the edge-emitting type, the width of the LED array 31 is larger than that of the LED array 1 of FIG.
Can be reduced by the dimension D) shown in FIG.

FIG. 16 shows an LED according to a second embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a structure when an array 31 is mounted on a printer head. In FIG. 16, the same components as those in FIG. 14 are denoted by the same reference numerals. As shown in FIG.
Even when the edge emitting type LED array 31 is used, the wire can be pulled out from one side of the LED array 31, that is, only from the electrode side end face 22, similarly to the first embodiment. Further, since the width of the LED array itself can be reduced by the dimension D shown in FIG. 1, the head size of the printer head can be further reduced as compared with the first embodiment.

As described above, according to the second embodiment, the n-side electrode 15 and the p-side pad electrode 14b are formed on the same side with respect to the light-emitting portion 43, and the light-emitting portion 43 is close to the light-emitting portion side end face 23. By forming the LED array 31, it is possible to manufacture the edge emitting LED array 31 in which the rows of the light emitting units 43 are formed at high density. In addition, because of the edge emission type, L
The width of the ED array itself can be made smaller than that of the first embodiment, so that the head size of the printer head can be further reduced.

Third Embodiment FIG. 17 is a top view showing the structure of an LED array 51 according to a third embodiment of the present invention. In FIG. 17, FIG.
The same components as those in FIG. 15 are denoted by the same reference numerals. L
The ED array 51 includes the n-side electrode 15 as the n-side electrode 65 and the n-side opening 17 in the LED array 1 shown in FIG.
Is the n-side opening 67, and the p-side electrode 14 is the p-side electrode 6
4, and the p-side pad electrode 14b is
It is what it was.

In FIG. 17, the number N of LEDs 10 in the n-type semiconductor block 11 is N = 5, and the number M of p-side matrix wires 14 is M = 5. Further, the n-side electrode 65
And two p-side pad electrodes 64b are formed on one n-type semiconductor block 11, respectively. The number of n-side electrodes 65 in the n-type semiconductor block 11 and p
The number of the side pad electrodes 64b may be the same, and may be one or three or more. The LED array 51 shown in FIG. 17 is different from the LED array 1 shown in FIG. 1 in the number N of the LEDs 10 in the n-type semiconductor block 11, the number M of the p-side matrix wirings 4, and the locations where the via holes 21 are formed. However, the operation of the LED array 51 is the same as that of the LE shown in FIG.
It is basically the same as D array 1.

The LED array 51 of the third embodiment has n
The side electrode 65 and the p-side pad electrode 64b are arranged in a line. Further, the n-side electrode 65 and the p-side pad electrode 64b are alternately arranged. That is, in the row of the p-side pad electrodes 64b, the n-side electrodes 65 are formed between the p-side pad electrodes 64b. Thereby, the width size of the LED array 51 can be made smaller than the LED array 1 of FIG. 1 by the dimension E shown in FIG. Note that the light emission characteristics of the LED array 51 have already been confirmed by the inventors of the present application, and are excellent light emission characteristics similar to those of the conventional LED array.

FIG. 18 shows an LED according to a third embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a structure when an array 51 is mounted on a printer head. In FIG. 18, the same components as those in FIGS. 14 and 16 are denoted by the same reference numerals. As shown in FIG. 18, even when the LED array 51 is used, the wires can be drawn out from one side of the LED array 51, that is, only from the electrode-side end face 22 side, similarly to the first and second embodiments. . In addition, since the width of the LED array itself can be reduced by the dimension E shown in FIG. 1, the head size of the printer head can be further reduced as compared with the first embodiment.

As described above, according to the third embodiment, by arranging the n-side electrode 65 and the p-side pad electrode 64b in a line, the width of the LED array itself is made smaller than that of the first embodiment. Therefore, the head size of the printer head can be further reduced.

Fourth Embodiment FIG. 19 is a top view showing the structure of an LED array 71 according to a fourth embodiment of the present invention. In FIG. 19, the same components as those in FIG. 1, FIG. 15, or FIG. 17 are denoted by the same reference numerals. The LED array 71 according to the fourth embodiment is the same as that shown in FIG.
In the LED array 1 shown in FIG.
In the LED array 51 shown in FIG.
Is an n-side electrode 85, and the n-side opening 67 is an n-side opening 87.
The p-side electrode 64 is a p-side electrode 84 and the p-side pad electrode 64b is a p-side pad electrode 84b. The operation of the LED array 71 is the same as that of the LED array 51 of the third embodiment. The structure when the LED array 71 is mounted on the printer head is the same as that in FIG.

The LED array 71 of the fourth embodiment has n
It is characterized in that the side electrodes 85 and the p-side pad electrodes 84b are arranged in a line, and one n-side electrode 85 is arranged in each n-type semiconductor block 11.
This makes it possible to increase the electrode pitch or electrode interval of the electrode row including the p-side pad electrode 84b and the n-side electrode 85, and to increase the size of each electrode in the row direction. Therefore, when the LED array 71 is mounted on the printer head, the distance between the wires is widened, and the wires can be easily collected even if a wire bonding failure occurs. Can be cheaper. Note that the light emission characteristics of the LED array 71 have already been confirmed by the present inventors, and are good light emission characteristics that are not different from those of the conventional LED array.

The manufacturing process of the LED array 71 of the fourth embodiment shown in FIG. 19 will be described below. 20 to 2
4 is a diagram illustrating an example of a manufacturing process of the LED array 71. In each of the drawings, (a) is a top view, (b) is a cross-sectional view taken along line AA ′ in (a), and (c) is a cross-sectional view taken along line BB ′ in (a).

First, as shown in FIG. 20, an n-type n-type semiconductor substrate 2b made of a semi-insulating GaAs substrate is formed in the same manner as in the manufacturing steps shown in FIGS. 2 to 8 in the first embodiment. A semiconductor substrate 2 on which an n-type semiconductor substrate 2b made of an AlGaAs epitaxial layer is formed,
A diffusion mask 25 (first interlayer insulating film 12) and a first opening 16a are formed on the surface of the n-type semiconductor substrate 2a.
First opening 1 of n-type semiconductor substrate 2a by n solid phase diffusion method
A light emitting section (p-type semiconductor layer) 13 is formed in the region 6a, and an n-side opening 87 is formed in the first interlayer insulating film 12.
The n-side opening 87 is formed at a position where the region where the p-side pad electrode 84b is to be formed and the n-side opening 87 are aligned with each other.
Formed one by one.

Next, as shown in FIG. 21, the n-side opening 87 is formed.
Is formed on the surface of the n-type semiconductor substrate 2a where the p-side electrode 84 has been formed, and this conductive film is patterned by a lift-off method to form the p-side electrode 84. Thereafter, a sintering process is performed. As the above conductive film,
For example, an Al film is used.

Next, as shown in FIG. 22, a conductive film to be the n-side electrode 85 is formed on the surface of the n-type semiconductor substrate 2a on which the p-side electrode 84 has been formed, and this conductive film is lifted off. And an n-side electrode 8 is formed in the n-side opening 87.
5 is formed. Thereafter, a sintering process is performed. As the conductive film to be the n-side electrode 85, for example, an Au alloy film is used. The p-side pad electrode 84b and the n-side electrode 85 of the p-side electrode 84 are arranged in a line. Note that the process shown in FIG. 21 and the process shown in FIG. 22 may be combined into one to form the n-side electrode 85 and the p-side electrode 84 at the same time. Thus, the number of steps of forming a conductive film and patterning the conductive film can be reduced by one, so that the steps can be simplified.

Next, as shown in FIG. 23, similar to the procedure shown in FIGS. 11 to 13 of the first embodiment,
A block separation groove 3 is formed in the semiconductor substrate 2 on which the n-side electrode 85 has been formed, a second interlayer insulating film 18 is formed thereon, and a second opening 16 b is formed in the second interlayer insulating film 18. p
A side pad opening 19, an n-side pad opening 20, and a via hole 21 are formed.

Finally, as shown in FIG. 24, a conductive film to be the p-side matrix wiring 4 is formed on the surface of the semiconductor substrate 2 on which the second interlayer insulating film 18 has been patterned, and this conductive film is lifted off. The p-side matrix wiring 4 is formed by patterning by the method. Thereafter, a sintering process is performed. As described above, the LED array 71 shown in FIG.
Is manufactured. The manufacturing process of the third embodiment is the same as that of the fourth embodiment.

As described above, according to the fourth embodiment, the n-side electrode 85 and the p-side pad electrode 84b are arranged in a line,
Further, an n-side electrode 85 is provided on each n-type semiconductor block 11.
Are arranged one by one, so that the p-side pad electrode 84b
The electrode pitch or the electrode interval of the electrode row including the n-side electrodes 85 can be increased, and the size of each electrode in the row direction can be increased. Therefore LE
When the D array 71 is mounted on the printer head, the distance between the wires is widened, and even if a wire bonding failure occurs, the wires can be easily collected. Therefore, the mounting cost is lower than in the third embodiment. it can.

Fifth Embodiment FIGS. 25A and 25B are top views showing the structure of an LED array 91 according to a fifth embodiment of the present invention, wherein FIG. 25A is a top view, and FIG. 25B is AA in FIG. FIG. Note that FIG.
In FIG. 5, the same components as those in FIGS. 15 and 19 are denoted by the same reference numerals.

The LED array 91 according to the fifth embodiment is obtained by applying the fourth embodiment to an edge-emitting LED array. Therefore, the LED array 91 is an edge-emitting LED array. In the LED array 71 of FIG. 19, the light emitting unit 13 is the light emitting unit 43 and the p-side opening 16 is the p-side opening 46. .

The light emitting portion (p-type semiconductor layer) 43 and the p-side opening 46 are the same as those shown in FIG. 15, and are formed on the light emitting portion side end face 23 of the n-type semiconductor block 11 (n-type semiconductor substrate 2a). They are formed close to each other. The surface of the light emitting section 43 in the opening 46 is entirely covered with the p-side electrode 84. The light-emitting characteristics of the edge-emitting LED array 91 have already been confirmed by the inventors of the present application, and are excellent light-emitting characteristics similar to those of the conventional LED array. The manufacturing process of the LED 91 is basically the same as that of the fourth embodiment. However, a step of processing the light emitting unit side end surface 23 may be added. LED array 9
The operation of No. 1 is the same as that of the LED array 71 of the above-described fourth embodiment, except that the emitted light is emitted from the light emitting unit side end face 23.

As shown in FIG. 25, an n-side electrode 85 and a p-side pad electrode 84b are formed in a line on the electrode side end face 22 side, and a light emitting section (p type semiconductor layer) 43 is formed on the light emitting section side end face 23. By forming the LED arrays 91 close to each other, it is possible to manufacture the edge emitting LED array 91. Further, since the LED array 91 is of the edge emission type, the width of the LED array 91 can be made smaller than that of the LED array 71 of the top emission type shown in FIG.

FIG. 26 shows an LED according to a fifth embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a structure when an array 91 is mounted on a printer head. In FIG. 26, the same components as those in FIG. 16 are denoted by the same reference numerals. As shown in FIG.
The wire can be pulled out from one side of the edge emitting LED array 91, that is, only from the electrode side end face 22 side. Also, a top emission type LED array 71 shown in FIG.
The head size of the printer head can be further reduced as much as the width of the LED array itself can be reduced as compared with the case of using.

As described above, according to the fifth embodiment, the n-side electrode 85 and the p-side pad electrode 84b are formed in a line on the side of the electrode-side end face 22, and the light-emitting portion (p-type semiconductor layer) 43 emits light. By forming the LED array 91 close to the unit-side end surface 23, it is possible to manufacture the end-surface emitting LED array 91. In addition, since the LED array is of the edge emission type, the width of the LED array itself can be made smaller than that of the fourth embodiment, so that the head size of the printer head can be made smaller.

In the embodiment of the present invention, only the homojunction composed of the same crystal has been described. However, the present invention can be applied to a heterojunction in which different materials are bonded.

[0067]

As described above, according to the LED array and the method of manufacturing the same according to the present invention, the first conductive side electrode is formed on the same side as the second conductive side pad electrode with respect to the light emitting portion row, and the second conductive side electrode is formed.
A high-density LED in which the first conductive side electrode and the second conductive side pad electrode are arranged on the same side with respect to the light emitting unit row by being connected to the first conductive type semiconductor substrate on the same side as the conductive side pad electrode There is an effect that an array can be realized. In addition, since an edge-emitting LED array can be realized, the width of the LED array can be reduced. Also, by forming the first conductive side electrodes and the second conductive side pad electrodes in a line, there is an effect that the width of the LED array can be reduced.

Further, according to the LED printer head of the present invention, by forming the printer head using the above-mentioned LED array, the bonding wire can be pulled out from one side of the LED array, so that the head size of the printer head can be reduced. There is an effect that it can be reduced. Further, the use of the above-described LED array having a reduced width size has an effect that the head size can be further reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a structure of an LED array according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 1).

FIG. 3 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 2).

FIG. 4 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 3).

FIG. 5 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 4).

FIG. 6 is a view illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 5).

FIG. 7 is a view illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 6).

FIG. 8 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 7).

FIG. 9 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 8).

FIG. 10 is a diagram illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 9).

FIG. 11 is a view illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 10).

FIG. 12 is a view illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 11).

FIG. 13 is a view illustrating an example of a manufacturing process of the LED array according to the first embodiment of the present invention (part 12).

FIG. 14 is a cross-sectional view illustrating a printer head mounting structure of the LED array according to the first embodiment of the present invention.

FIG. 15 is a diagram illustrating a structure of an LED array according to a second embodiment of the present invention.

FIG. 16 is a sectional view showing a printer head mounting structure of an LED array according to a second embodiment of the present invention.

FIG. 17 is a diagram illustrating a structure of an LED array according to a third embodiment of the present invention.

FIG. 18 is a sectional view showing a printer head mounting structure of an LED array according to a third embodiment of the present invention.

FIG. 19 is a diagram illustrating a structure of an LED array according to a fourth embodiment of the present invention.

FIG. 20 is a diagram illustrating an example of a manufacturing process of the LED array according to the fourth embodiment of the present invention (part 1).

FIG. 21 is a view illustrating an example of a manufacturing process of the LED array according to the fourth embodiment of the present invention (part 2).

FIG. 22 is a diagram illustrating an example of a manufacturing process of the LED array according to the fourth embodiment of the present invention (part 3).

FIG. 23 is a view showing an example of the manufacturing process of the LED array according to the fourth embodiment of the present invention (part 4).

FIG. 24 is a view illustrating an example of a manufacturing step of the LED array according to the fourth embodiment of the present invention (part 5).

FIG. 25 is a diagram illustrating a structure of an LED array according to a fifth embodiment of the present invention.

FIG. 26 is a sectional view showing a printer head mounting structure of an LED array according to a fifth embodiment of the present invention.

FIG. 27 is a top view showing the structure of a conventional LED array.

FIG. 28 is a diagram showing a structure of a conventional LED array.

FIG. 29 is a cross-sectional view showing a conventional printer array mounting structure of an LED array.

FIG. 30 is a top view showing the structure of a conventional LED array.

[Explanation of symbols]

1,31,51,71,91 LED array, 4p
Side matrix wiring, 2a n-type semiconductor substrate, 11 n
Semiconductor block 13, 43 light emitting portion (p-type semiconductor layer), 14, 64, 84 p-side electrode, 14b, 64
b, 84b p-side pad electrode, 15, 65, 85 n
Side electrode, 17, 67, 87 n-side opening, 22 light-emitting-portion-side end face, 23 electrode-side end face, 201 drive I
C, 202 block ground, 203 bonding wire.

Continuing from the front page (72) Inventor Takaatsu Shimizu 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (15)

[Claims] An N (N is an integer of 2 or more) comprising a semiconductor layer of a second conductivity type on a surface substrate side of a semiconductor substrate of a first conductivity type.
A plurality of light emitting portions are formed in a line, a first conductive side electrode serving as a pad electrode for connecting the semiconductor substrate to an external circuit, and N light emitting portions individually connected to the light emitting portion, on the surface of the semiconductor substrate. And the second conductive side electrodes are formed, and the N second conductive side electrodes are formed.
An LED array in which at least one of the conductive-side electrodes has a second conductive-side pad electrode for connecting to an external circuit, wherein the first conductive-side electrode is connected to the light-emitting portion column by the second
An LED array formed on the same side as the conductive side pad electrode and connected to the semiconductor substrate on the same side as the second conductive side pad electrode. 2. A plurality of semiconductor blocks, each of which is composed of the first conductive type semiconductor substrate on which the light emitting portion, the first conductive side electrode, and the second conductive side electrode are formed, and are separated from each other, are arranged in a line. And a predetermined second formed on each of the different semiconductor blocks.
2. The LED array according to claim 1, wherein a matrix wiring connecting between the conductive side electrodes is formed. 3. An interlayer insulating film having a first conductive side opening is formed on the surface of the semiconductor substrate, and the first conductive side electrode is formed in the first conductive side opening. The LED array according to claim 1. 4. The LED array according to claim 1, wherein the first conductive-side electrode is formed on the opposite side of the light-emitting portion row with respect to the second conductive-side pad electrode. 5. The LED array according to claim 1, wherein a plurality of electrodes including the first conductive side electrode and the second conductive side pad electrode are arranged in a line. 6. The LED array according to claim 5, wherein the first conductive side electrodes and the second conductive side pad electrodes are alternately arranged. 7. The LED array according to claim 1, wherein only one first conductive side electrode is formed. 8. The LED array according to claim 1, wherein the light emitting section is formed near an end face of the semiconductor substrate, and emitted light is radiated from the end face to the outside. 9. The LED array according to claim 1, wherein the first conductive side electrode and the second conductive side electrode are made of the same conductive film material. 10. The LED array according to claim 1, wherein said first conductivity type is n-type and said second conductivity type is p-type. 11. N (N is an integer of 2 or more) light-emitting portions formed of a semiconductor layer of a second conductivity type in a line on a surface substrate side of a semiconductor substrate of a first conductivity type, and a surface of the semiconductor substrate is formed. A first conductive side electrode serving as a pad electrode for connecting the semiconductor substrate to an external circuit, and N second conductive side electrodes individually connected to the light emitting unit are formed on the N-type semiconductor device. A method of manufacturing an LED array in which at least one of the second conductive side electrodes has a second conductive side pad electrode for connection to an external circuit, The first conductive side electrode is formed on the surface of the semiconductor substrate where the surface in the first conductive side electrode formation planned region set on the same side as the conductive side pad electrode or the second conductive side pad electrode planned region is exposed. After forming a conductive film, By patterning film, method for manufacturing an LED array, characterized in that the step of forming the first electroconductive side electrode. 12. Before performing the step of patterning the conductive film, an interlayer insulating film is formed on a surface of the semiconductor substrate, and the semiconductor is formed in a region of the interlayer insulating film where the first conductive side electrode is to be formed. Forming a first conductive side opening for exposing a substrate; and patterning the conductive film, forming the first conductive side electrode in the first conductive side opening. The method for manufacturing an LED array according to claim 11, wherein: 13. The step of patterning the conductive film includes forming a conductive film to be the first conductive side electrode and the second conductive side electrode on a surface of the semiconductor substrate, and patterning the conductive film. 12. The method according to claim 11, wherein the first conductive side electrode and the second conductive side electrode are simultaneously formed. 14. The method according to claim 11, wherein the first conductivity type is n-type and the second conductivity type is p-type. 15. An LED array according to claim 1, comprising: a drive circuit for driving the LED array; and a wire bonded to the first conductive side electrode and a second conductive side pad electrode. An LED, wherein a bonded wire is pulled out from one side of the LED array and bonded to the driving circuit.
Printer head.