JP4292651B2 - LED array chip and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a light emitting diode array chip (hereinafter referred to as an LED array chip) used as an exposure light source in a print head of an electrophotographic printer, and a method for manufacturing the same.
[0002]
[Prior art]
As a conventional LED array chip used for a light source of an electrophotographic printer, there is a structure shown in a sectional view of FIG. In the conventional LED array chip manufacturing method having the structure shown in FIG. 5, first, a silicon nitride (SiN) film is formed as a diffusion mask 13 on the n-type GaASP substrate 12. The diffusion mask 13 is provided with a plurality of diffusion windows 13a arranged and opened at a desired pitch by patterning by photolithography and etching. Next, the p-type diffusion region 14 is formed by diffusing impurities into the substrate through the respective diffusion windows 13a, for example, by vapor phase diffusion. During operation, the pn junction interface between each p-type diffusion region 14 and the n-type GaASP substrate 12 functions as a light-emitting unit. However, in the description to be described later, the p-type diffusion region 14 may be referred to as a light-emitting unit for convenience. Subsequently, an aluminum (Al) film is deposited on the diffusion region 14 and the diffusion mask 13 and patterned by photolithography and etching to form the p-side individual electrode 15. One end of the individual electrode 15 is ohmically connected to the p-type diffusion region 14, and an electrode pad (not shown) for wire bonding is formed at the other end. Then, after the back surface of the substrate 12 is polished to a predetermined substrate thickness, an Au alloy film is formed as the n-side common electrode 16 on the entire back surface, thereby completing the manufacture of the LED array chip. Thereafter, for example, dicing is performed, and each LED array chip is cut out.
[0003]
In the LED print head, a plurality of the LED array chips are mounted on a wiring board so that each light emitting portion is linear. Further, a driver IC for controlling the light emission operation of the LED array chip is mounted. Then, wire bonding is performed between the signal output terminal of the driver IC and the pad of the individual electrode of the LED array chip, and the current output circuit in the driver IC and each LED are electrically connected.
[0004]
In wire bonding, a gold wire is bonded to an electrode pad (bonding pad) by applying heat and pressure. Therefore, the electrode pads of the LED array chip can withstand the impact of wire bonding, and a certain degree of thickness is necessary to obtain a strong connection strength. In the conventional example, the Al film of the individual electrode 15 is uniformly formed with a thickness of about 1 to 2 μm including the ohmic connection portion with the diffusion region 14 and the bonding pad portion for wire bonding.
[0005]
[Problems to be solved by the invention]
However, in the conventional LED array chip, since the Al film of the individual electrode is formed thick and uniform, there is a problem that the shape of the individual electrode varies when the individual electrode is patterned. Here, the reason why the shape variation of the individual electrodes occurs will be described with reference to FIG. FIG. 6 is an enlarged view of the vicinity of the ohmic connection portion between the diffusion region 14 and the individual electrode 15, FIG. 6A is a sectional view thereof, and FIG. 6B is a plan view thereof. . In the plan view of FIG. 6B, the individual electrodes 15 are shown as hatched for convenience, but the individual electrodes 15 are naturally located under the resist pattern 20.
[0006]
Hereinafter, a description will be given with reference to FIGS. In order to form the individual electrode 15, first, an Al film having a thickness of 2 μm, for example, is deposited on the entire surface of the substrate (wafer) 12. Next, a resist is coated on the Al film. Subsequently, the resist is patterned by photolithography to obtain a resist pattern 20 for forming individual electrodes. Thereafter, the Al film is etched to form the individual electrodes 15. At this time, as shown in FIG. 6A, a portion of the Al film that is not covered by the resist pattern 20 is etched. However, since the etching of Al is isotropic, the resist film 20 is exposed from the edge E of the resist pattern 20. The inside of the pattern 20 is also etched (hereinafter referred to as side etching). In the case of isotropic etching, the amount s of side etching is usually about the same as the film thickness t. Therefore, the side etching amount s increases as the Al film thickness t increases. Moreover, the side etching amount s is not constant and varies depending on conditions such as the adhesion state of the resist pattern 20 and the temperature of the etching solution. Naturally, as the side etching amount s increases, the degree of variation in the side etching amount s increases. As shown in FIG. 6B, the shape and area of the individual electrode 15 vary depending on the side etching amount s. That is, when the side etching amount s varies, the shape of the individual electrode 15 varies within the LED array chip and between the LED array chips.
[0007]
Since the light from the lower part of the individual electrode 15 is not radiated to the outside in the light emitting unit 14, if the shape of the individual electrode 15 varies, a difference occurs in the light emitting area of each light emitting unit 14, which also affects the amount of light. Moreover, in a high-density LED array such as 1200 dpi, for example, the area of the light-emitting portion 14 is very small and the proportion occupied by the individual electrodes 15 is large. Therefore, even a slight variation in the shape of the individual electrodes 15 greatly affects the amount of light. Therefore, when an LED print head is configured using a large number of such LED array chips, there is a problem that good print quality cannot be obtained.
An object of the present invention is to solve the above problems, and to provide an LED array chip in which the variation in the shape of the individual electrodes on the light emitting portion is small and the light amount variation is small even when the light emitting portions are arranged at high density.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, according to the first aspect of the present invention, a semiconductor substrate of a first conductivity type and an interlayer insulating film formed on the semiconductor substrate are provided, and arranged on the interlayer insulating film at a predetermined pitch. A plurality of second conductivity type diffusion regions made of impurities of the second conductivity type formed in the semiconductor substrate, on the interlayer insulating film, and at positions corresponding to the plurality of opened windows. Formed in a predetermined pattern on the diffusion region , Connecting each of the diffusion regions to a bonding pad for wire bonding connection In an LED array chip comprising a plurality of individual electrodes, The individual electrode is a composite film in which a plurality of layers are laminated, The individual electrodes formed on the diffusion region are The above Total film thickness of composite film is 0.5μm or less And the total film thickness of the individual electrodes in the region extending to the bonding pad on the interlayer insulating film is larger than the total film thickness of the individual electrodes formed on the diffusion region It is characterized by that.
[0009]
Claims 2 According to the method for manufacturing an LED array chip of the present invention, a diffusion mask having a plurality of diffusion windows arranged at a predetermined pitch and having a plurality of diffusion windows is formed on the first conductive type semiconductor substrate. Forming a plurality of second conductivity type diffusion regions by diffusing impurities of the second conductivity type into the semiconductor substrate through the respective diffusion windows, and on the interlayer insulating film and Formed in a predetermined pattern on each diffusion region, A bonding pad for wire bonding connection is connected to each diffusion region. A step of forming a plurality of individual electrodes, and the step of forming the individual electrodes includes: The individual electrode is formed of a composite film in which a plurality of layers are laminated, The individual electrode formed on the diffusion region is The above The total film thickness of the composite film is 0.5 μm or less. The total thickness of the individual electrodes in the region extending to the bonding pad on the interlayer insulating film is thicker than the total thickness of the individual electrodes formed on the diffusion region. It is characterized by that.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a diagram showing a structure of a main part of an LED array chip 1 according to an embodiment of the present invention. FIG. 1 (a) is a plan view thereof, and FIG. It is sectional drawing of the part of -A 'line. The embodiment of the present invention will be described in detail with reference to FIGS. 1 (a) and 1 (b).
[0012]
In FIG. 1, 2 is a first conductivity type semiconductor substrate (here, n-type semiconductor substrate), 3 is a diffusion mask (insulating film), 3a is a diffusion window opened in the diffusion mask 3, and 4 is a second. A conductive diffusion region (here, p-type diffusion region), 5 is a p-side individual electrode, and 6 is an n-side common electrode.
As the n-type semiconductor substrate 2, for example, a substrate obtained by epitaxially growing an n-type GaAsP layer on an n-type GaAs substrate is used. For example, an aluminum nitride film (AlN) is used as the diffusion mask 3 and functions as a diffusion mask when impurities are diffused into the n-type semiconductor substrate 2 and as an interlayer insulating film after the diffusion is completed. The diffusion mask 3 is provided with a plurality of diffusion windows 3a arranged and opened at a desired pitch corresponding to the light emitting portions by patterning by photolithography and etching. Through each diffusion window 3a, a p-type diffusion region 4 is formed by diffusing impurities into the substrate by, for example, a vapor phase diffusion method.
[0013]
As shown in FIG. 1B, the diffusion region 4 is formed not only in a portion corresponding to the diffusion window 3a but also partially entering under the diffusion mask 3 by lateral diffusion. During operation, the pn junction interface between each p-type diffusion region 4 and the n-type semiconductor substrate 2 functions as a light-emitting portion. Here, for convenience, the p-type diffusion region 4 may be referred to as a light-emitting portion. The p-type diffusion regions 4 are arranged in an array at a predetermined pitch on the n-type semiconductor substrate 2 in a straight line.
[0014]
The individual electrode 5 is made of, for example, an electrode material such as aluminum (Al) or gold (Au), and is composed of each part of a contact part 5a, a wiring part 5b, and a bonding pad part 5c for wire bonding. Here, the individual electrode 5 will be described using, for example, an Al-based electrode material. In the case of this Al system, the individual electrode 5 is formed by using a composite film in which a nickel (Ni) film is thinly laminated as an antioxidant film on the Al film, as will be described in detail in the description of the manufacturing method described later. Is done.
[0015]
In this individual electrode, the contact portion 5 a is formed on the p-type diffusion region 4 so as to cover a part of the surface of the p-type diffusion region 4 and on the diffusion mask 3 in the vicinity of the p-type diffusion region 4. And ohmic connection with the p-type diffusion region 4. The contact portion 5a with the p-type diffusion region 4 is formed thin in order to reduce the shape variation of the individual electrodes on the light emitting portion. The thickness of the contact portion 5a is preferably about 0.5 μm or less so that variations in pattern formation can be ignored compared to the pattern alignment accuracy of ± 0.5 μm in photolithography. It is about 0.2 μm. The bonding pad portion 5c is formed for wire bonding connection, and the film thickness thereof is formed relatively thick to withstand an impact during wire bonding and to obtain a strong connection strength. In the case of Al, for example, it is about 2 μm. The wiring part 5b connecting the contact part 5a and the bonding pad part 5c preferably has a wiring resistance that is sufficiently smaller than the junction resistance of the pn junction, and is formed to have a thickness of about 2 μm, for example, the same as the bonding pad part 5c. That is, in this embodiment, the individual electrode 5 has a configuration in which only the contact portion 5a with the p-type diffusion region 4 is thinner than the wiring portion 5b and the bonding pad portion 5c which are other portions. Yes.
[0016]
Next, the 1st manufacturing method of the LED array chip 1 of this Embodiment is demonstrated with reference to FIG. 2A to 2E, a process of manufacturing the LED array chip of the present embodiment using the solid phase diffusion method will be described.
First, an insulating film is formed on an n-type semiconductor substrate 2 (a substrate in which an n-type GaAsP epitaxial growth layer is provided on an n-type GaAs substrate) 2 in order to form a diffusion mask 3. Here, for example, an AlN film is formed as the insulating film. This AlN film is formed by sputtering or the like, and the film thickness is, for example, about 0.2 μm. Then, patterning is performed by general photolithography and etching to form a diffusion mask 3 having diffusion windows 3a opened at a desired pitch. The diffusion mask 3 also functions as an interlayer insulating film that provides electrical insulation between the n-type substrate 2 and the individual electrode 5.
[0017]
Subsequently, on the portion of the n-type semiconductor substrate 2 exposed from the diffusion window 3a and the diffusion mask 3, an oxide film containing, for example, Zn which is a p-type impurity as the diffusion source film 7, and an SiN film as the annealing cap 8, for example. Are sequentially stacked to form a film. The diffusion source film 7 made of an oxide film containing Zn is formed by a sputtering method, and the annealing cap 8 made of a SiN film is formed by a CVD method, and each film thickness is about 0.1 μm, for example. After film formation, high-temperature annealing is performed to diffuse Zn, which is a p-type impurity, into the substrate, and a p-type diffusion region 4 is formed in the n-type semiconductor substrate 2. By this high temperature annealing, a p-type diffusion region 4 having a diffusion depth of about 1 μm is formed. This state is shown in FIG.
[0018]
Next, as shown in FIG. 2B, the entire surface of the diffusion source film 7 and the annealing cap film 8 is removed by etching or the like while leaving only the diffusion mask 3. Here, as the etching solution, a material that does not etch the diffusion mask 3, for example, hydrofluoric acid or buffered hydrofluoric acid is used.
[0019]
Next, a thin Al-based conductor film pattern 5 ′ that becomes a part of the p-side individual electrode 5 is formed. As the Al-based conductor film, for example, a composite film in which an Al film having a thickness of about 0.2 μm and a Ni film having a thickness of about 0.02 μm are sequentially deposited and stacked is used. Hereinafter, this composite film is referred to as an Al-based conductor film. In this composite film, the thin Ni film laminated on the Al film is mainly intended to prevent oxidation of the surface of the Al film on the lower layer side when the Al film is laminated. Further, a wiring portion 5b and a bonding pad portion 5c described later are used. It is provided for the purpose of improving the adhesion when the Al film is thickened in the region to be formed.
[0020]
The thin Al-based conductor film pattern 5 ′ is formed by using, for example, a general lift-off method. That is, after a resist is deposited on the entire surface, a resist pattern is formed by removing the resist in a region corresponding to at least a region where the contact portion 5a is to be formed and a part of a region where the wiring portion 5b is to be formed. Thereafter, a composite film in which an Al film having a thickness of about 0.2 μm and a Ni film having a thickness of about 0.02 μm are sequentially deposited as the Al-based conductor film is formed on the entire surface. Thereafter, by removing the resist using a predetermined solvent, a film thickness that becomes a part of the individual electrode 5 in a region corresponding to at least a region where the contact part 5a is to be formed and a part of the region where the wiring part 5b is to be formed. A thin Al-based conductor film pattern 5 ′ is formed and is ohmically connected to the corresponding diffusion region 4. In the thin Al-based conductor film pattern 5 ′, the portion that is in ohmic contact with the diffusion region 4 and the vicinity thereof become the contact portion 5 a of the individual electrode 5.
[0021]
3A and 3B show examples of the planar shape of the thin Al-based conductor film pattern 5 '. FIG. 3A shows a case where the thin Al-based conductor film pattern 5 ′ whose planar pattern is a part of the individual electrode 5 is formed in the same shape as the planar pattern of the final individual electrode 5. Indicates. FIG. 3B shows a pattern 5 of a thin Al-based conductor film that becomes a part of the individual electrode 5 in a region corresponding to a region where the contact part 5a is to be formed and a part of the region where the wiring part 5b is to be formed. The case where 'is formed is shown. In the thin Al-based conductor film pattern 5 ′ shown in FIGS. 3A and 3B, the portion indicated by reference numeral 5 a becomes the contact portion 5 a of the individual electrode 5. In addition, as the shape of the thin Al-based conductor film pattern 5 ', various shapes can be used.
[0022]
The thin Al-based conductor film pattern 5 ′ formed here has a thin film thickness of about 0.22 μm, so that the difference in width between the upper surface and the lower surface of the formed pattern 5 ′ is small, and this thin Since the conductor film pattern 5 ′ is formed using the lift-off method, the variation in shape can be reduced. As a result, the contact portions 5a of the individual electrodes 5 formed so as to be connected to the respective diffusion regions 4 can accurately form the electrode width while minimizing variation in shape.
[0023]
FIG. 2C shows a state in which the thin Al-based conductor film pattern 5 ′ is formed in this way. Here, the planar pattern shape of the thin Al-based conductor film pattern 5 ′ is shown as a planar pattern shape shown in FIG. Therefore, a thick Al-based conductor film pattern 5 ″, which will be described later, is formed on the wiring portion 5b formation planned region and the bonding pad portion 5c formation planned region in the thin Al-based conductor film pattern 5 ′. 3B is adopted as the pattern 5 ′ of the thin Al-based conductor film, the wiring portion 5b formation planned region and the bonding pad portion described later are used. The thick Al-based conductor film pattern 5 ″ formed in the region to be formed 5c is formed so as to overlap the thin Al-based conductor film pattern 5 ′ only in a part of the region to be formed with the wiring part 5b. Is done.
In FIG. 2 (c), the thin Al-based conductor film pattern 5 'is shown as a single layer for the sake of convenience, but in reality, a thinner Ni film is laminated on the thin Al film as described above. It consists of a composite membrane.
[0024]
Subsequently, as shown in FIG. 2D, the film thickness is formed on the wiring portion 5b formation planned region of the thin Al-based conductor film pattern 5 'and the bonding pad portion 5c formation planned region for wire bonding connection. A thick Al-based conductor film pattern 5 ″ is formed. The thick Al-based conductor film pattern 5 ″ is also formed using a general lift-off method. That is, after a resist is deposited on the entire surface, a resist pattern is formed by removing the resist in the regions corresponding to the wiring portion 5b formation planned region and the bonding pad portion 5c formation planned region by photolithography, As the Al-based conductor film, a composite film is formed by sequentially depositing an Al film having a thickness of about 1.8 μm and a Ni film having a thickness of about 0.02 μm. Thereafter, the resist is removed by using a predetermined solvent, whereby a thick Al-based conductor that becomes a part of the individual electrode 5 in a region corresponding to the wiring portion 5b formation scheduled region and the bonding pad portion 5c formation scheduled region. A film pattern 5 ″ is formed. Thus, a thick Al-based conductor film pattern 5 ″ is formed on the thin Al-based conductor film pattern 5 ′. 5b and the bonding pad portion 5c, the thickness of the portion is about 2.04 μm, which is the total thickness of both the thin Al-based conductor film pattern 5 ′ and the thick Al-based conductor film pattern 5 ″.
[0025]
As described above, the individual electrode 5 is formed by dividing the Al-based conductor film formation and patterning process into two steps, thereby reducing the thin portion 5a (thickness: about 0.22 μm) and the thick portion 5b. 5c (film thickness of 2.04 μm) is formed. This is shown in FIG. In FIG. 2 (e), the individual electrodes 5 are shown as a continuous film for the sake of convenience, but in actuality, as described above, the thickness of the individual electrode 5 is reduced on the thin Al-based conductor film pattern 5 ′. A thick Al-based conductor film pattern 5 ″ is laminated.
[0026]
Finally, as shown in FIG. 2E, the back surface is polished to make the substrate have a predetermined thickness, and then the n-side common electrode 6 is formed on the back surface of the substrate. Here, the common electrode 6 is formed by evaporating a gold alloy or the like, for example. In this way, the LED array chip 1 according to the present embodiment shown in FIG. 1 is completed.
In the above description, a composite film in which an Al film having a thickness of about 1.8 μm and a Ni film having a thickness of about 0.02 μm are sequentially deposited and laminated is used as the thick conductor film pattern 5 ″ on the upper layer side. However, since the Ni film is mainly intended to prevent the oxidation of the surface of the Al film on the laminated side during lamination, the conductive film pattern 5 ″ having a large film thickness, which is the conductive film pattern on the upper layer side, A configuration including only an Al film having a thickness of about 1.8 μm may be used without providing the Ni film.
[0027]
Next, the 2nd manufacturing method of the LED array chip 1 of this invention is demonstrated. In the second manufacturing method, the manufacturing process of the first method is different from the manufacturing process of the individual electrode 5 only in the processes shown in FIGS. 2A, 2B, and 2E are the same as each other, and thus redundant description is omitted.
[0028]
The second method will be described below with reference to FIGS. 4 (a) and 4 (b). These steps of FIGS. 4A and 4B correspond to the steps of FIGS. 2C and 2D of the first method described above. Prior to the step for forming the p-side individual electrode 5, the steps shown in FIGS. 2A and 2B are performed in advance as in the first method described above.
[0029]
After the diffusion region 4 is formed by the steps of FIGS. 2A and 2B, as shown in FIG. 4A, the bonding pad portion 5c for wiring bonding connection and the bonding pad portion 5c for wire bonding connection are scheduled to be formed. A thick Al-based conductor film pattern 5 ″ is formed on the region. The thick Al-based conductor film pattern 5 ″ is formed by the general method described in the first method. It is formed using a lift-off method. That is, after a resist is deposited on the entire surface, a resist pattern is formed by removing the resist in the regions corresponding to the wiring portion 5b formation planned region and the bonding pad portion 5c formation planned region by photolithography, As the Al-based conductor film, a composite film is formed by sequentially depositing an Al film having a thickness of about 1.8 μm and a Ni film having a thickness of about 0.02 μm. Thereafter, the resist is removed by using a predetermined solvent, whereby a thick Al-based conductor that becomes a part of the individual electrode 5 in a region corresponding to the wiring portion 5b formation scheduled region and the bonding pad portion 5c formation scheduled region. A film pattern 5 ″ is formed.
[0030]
Subsequently, as shown in FIG. 4B, a thin Al-based conductor film pattern 5 ′ is formed on the thick Al-based conductor film pattern 5 ″ and the contact portion 5a formation planned region. The thin Al-based conductor film pattern 5 ′ is also formed by a general lift-off method, that is, after the resist is deposited on the entire surface, the region where the wiring portion 5b is to be formed and the bonding pad are formed by photolithography. A resist pattern is formed by removing the resist corresponding to the thick Al-based conductor film pattern 5 ″ formed corresponding to the region 5c to be formed and the region corresponding to the contact region 5a to be formed. Thereafter, a composite film in which an Al film having a thickness of about 0.2 μm and a Ni film having a thickness of about 0.02 μm are sequentially deposited as the Al-based conductor film is formed on the entire surface. Thereafter, by removing the resist using a predetermined solvent, a thin Al-based conductor film pattern 5 ′ is formed on the thick Al-based conductor film pattern 5 ″ and in the region where the contact portion 5a is to be formed. In this way, a contact portion made of the Al-type conductive film pattern 5 ′ having a small thickness (about 0.22 μm thickness) is formed on the diffusion region 4 and on the diffusion mask 3 in the vicinity thereof. In addition, the portion where the thin Al-based conductor film pattern 5 'is formed on the thick Al-based conductor film pattern 5 "is bonded to the wiring portion 5b of the individual electrode 5. The pad portion 5c has a thickness of about 2.04 μm, which is the total thickness of both the thin Al-based conductor film pattern 5 ′ and the thick Al-based conductor film pattern 5 ″. , Thick conductor film Although the thin Al-based conductor film pattern 5 ′ is formed on the entire surface of the wiring 5 ″, the thin Al-based conductor film pattern 5 ′ is formed on the contact portion 5a and the wiring portion. Therefore, it is sufficient that the electrode 5 is formed so as to be able to be electrically connected to 5b. Therefore, the individual electrode 5 is formed in a region corresponding to at least a region where the contact portion 5a is to be formed and a portion of the region where the wiring portion 5b is to be formed. It is only necessary to form a thin Al-based conductor film pattern 5 ′ to be a part.
[0031]
As described above, the contact portion 5a formed on the p-type diffusion region 4 and the diffusion mask 3 in the vicinity thereof, connected to the diffusion region and formed thin, and the wiring formed thick. An individual electrode 5 including a portion 5 b and a bonding pad portion 5 c for wire bonding is formed corresponding to each diffusion region 4. Here, since the film thickness of the thin Al-based conductor film pattern 5 ′ that is patterned for the contact portion 5a that is a portion connected to the diffusion region 4 is as thin as about 0.22 μm, this The difference in the electrode width between the upper surface and the lower surface of the partial film is small, and variation in shape can be reduced. In addition, since the thin conductor film pattern 5 ′ is formed by using the lift-off method, the variation in shape can be reduced from this point. As a result, the contact portion 5a of each individual electrode 5 formed so as to be connected to each diffusion region 4 can be formed with high accuracy while suppressing variation in shape. Although the procedure for forming the individual electrode 5 by the second method is different from that of the first method, the film formation and patterning steps of the Al-based conductor film are performed in two steps to reduce the film thickness. A portion 5a (film thickness 0.22 μm) and a thick portion 5b, 5c (film thickness 2.04 μm) can be formed.
[0032]
Next, in the same manner as in the first method described above, in the step shown in FIG. 2E, the n-side common electrode 6 made of a gold alloy or the like is formed on the back surface of the substrate. In this way, the LED array chip 1 according to the present embodiment shown in FIG. 1 is completed.
In the above description, a composite film obtained by sequentially depositing and laminating an approximately 0.2 μm thick Al film and an approximately 0.02 μm thick Ni film is used as the thin conductive film pattern 5 ′ on the upper layer side. However, since the Ni film is mainly intended to prevent oxidation of the surface of the Al film on the layered side during lamination, the conductive film pattern 5 ′ having a thin film thickness, which is the conductive film pattern on the upper layer side, It is good also as a structure which consists only of about 0.2 micrometer-thick Al film, without providing Ni film.
[0033]
The steps of the manufacturing methods described above are merely examples. For example, after the diffusion is completed, another insulating film is laminated on the diffusion mask 3 functioning as an interlayer insulating film, so that the interlayer insulating film has two layers. Also good. By doing so, the electrical insulation between the individual electrode 5 and the semiconductor substrate 2 can be further improved. In the above description, the case where the solid phase diffusion method is used for forming the diffusion region has been described. However, a vapor phase diffusion method may be used instead. In the above description, the case where the individual electrodes are formed using the lift-off method is shown, but it is naturally possible to form the electrodes using the wet method. In the above description, the case where the Al-based conductor film formed by laminating the Al film and the Ni film is used as the conductor film, but a gold (Au) -based conductor film may be used instead. Is possible. In the case of this gold (Au) based conductor film, a Ti film, a Pt film, a Ti / Pt / Au composite film in which an Au film is laminated, or an AuGe / Ni composite film in which an AuGe film and a Ni film are laminated, etc. Is used.
The present invention is not limited to the above-described embodiments, and various modifications can be made based on the spirit of the present invention, and these are not excluded from the scope of the present invention.
[0034]
【The invention's effect】
As described above, in the LED array chip 1 of the present invention, the film thickness of the individual electrode 5 is thin at the contact portion 5a which is a portion connected to the p-type diffusion region 4 and a portion in the vicinity thereof, and this contact portion. The wiring portion 5b, which is a portion other than 5a, and the bonding pad portion 5c for wire bonding connection are formed thick.
Thus, since the individual electrode 5 is formed thin in the contact portion 5a, the difference in the electrode width between the upper surface and the lower surface of the film in this portion is small, and the variation in shape can be reduced. Therefore, variation in the electrode shape of the contact portion 5a connected to the diffusion region 4 can be reduced, and the contact portion 5a of the individual electrode 5 can be formed with high accuracy. Therefore, even if the light emitting portions are formed at a high density of 1200 dpi (dots per inch) or more, the variation in the light emission area can be reduced, and the variation in the light amount can be expected.
On the other hand, since the bonding pad portion 5c for wire bonding connection is formed with a large film thickness, the wire bonding connection can withstand an impact at the time of connection and obtain a strong bonding strength. Further, since the wiring portion 5b is also formed with a large film thickness, the problem of an increase in wiring resistance does not occur.
That is, according to the present invention, even in a high-density LED array chip, a high production yield and a reduction in light quantity variation can be expected.
[Brief description of the drawings]
FIG. 1 is a diagram showing a structure of a main part of an LED array chip according to an embodiment of the present invention.
FIG. 2 is a diagram showing a manufacturing process of the LED array chip according to the embodiment of the present invention.
FIG. 3 is a diagram showing an example of a planar shape of a thin Al-based conductor film pattern in an embodiment of the present invention.
FIG. 4 is a diagram showing another example of the individual electrode forming step of the LED array chip according to the embodiment of the present invention.
FIG. 5 is a cross-sectional view showing a structure of a main part of a conventional LED array chip.
FIG. 6 is a diagram for explaining the occurrence of variation in the shape of individual electrodes in a conventional LED array chip.
[Explanation of symbols]
1 LED array chip
2 n-type semiconductor substrate
3 Diffusion mask
3a Diffusion window
4 p-type diffusion region
5 p-side individual electrode
5a Contact part
5b Wiring part
5c Bonding pad
5 'thin Al conductor film pattern
5 "thick Al-based conductor film pattern
6 n-side common electrode
7 Diffusion source film
8 Annealing cap

Claims (2)

A first conductivity type semiconductor substrate; and an interlayer insulating film formed on the semiconductor substrate, the position corresponding to a plurality of windows arranged and opened in the interlayer insulating film at a predetermined pitch, A plurality of second conductivity type diffusion regions made of impurities of the second conductivity type formed in the semiconductor substrate, and a predetermined pattern formed on the interlayer insulating film and each diffusion region, for wire bonding connection In the LED array chip comprising a plurality of individual electrodes connecting the bonding pad and each of the diffusion regions ,
The individual electrode is a composite film in which a plurality of layers are laminated,
Individual electrodes formed on the diffusion region, the total thickness of the composite film is at 0.5μm or less,
The LED array chip , wherein a total film thickness of the individual electrodes in a region extending to the bonding pad on the interlayer insulating film is larger than a total film thickness of the individual electrodes formed on the diffusion region . Forming a diffusion mask having a plurality of diffusion windows arranged and opened at a predetermined pitch on the semiconductor substrate of the first conductivity type as all or part of the interlayer insulating film;
Forming a plurality of second conductivity type diffusion regions by diffusing second conductivity type impurities into the semiconductor substrate through the diffusion windows;
Forming a plurality of individual electrodes that are formed in a predetermined pattern on the interlayer insulating film and on each diffusion region, and connect the bonding pads for wire bonding connection and each of the diffusion regions ;
The individual electrode forming step, the individual electrodes to form a plurality of layers of a composite film formed by stacking, the individual electrode formed on the diffusion region, the total thickness of the composite film to 0.5μm or less The LED is characterized in that the total film thickness of the individual electrodes in the region extending to the bonding pad on the interlayer insulating film is thicker than the total film thickness of the individual electrodes formed on the diffusion region. Array chip manufacturing method.

Images