JPH1174295A - Method for packaging electronic circuit - Google Patents

Method for packaging electronic circuit

Info

Publication number
JPH1174295A
JPH1174295A JP9247449A JP24744997A JPH1174295A JP H1174295 A JPH1174295 A JP H1174295A JP 9247449 A JP9247449 A JP 9247449A JP 24744997 A JP24744997 A JP 24744997A JP H1174295 A JPH1174295 A JP H1174295A
Authority
JP
Japan
Prior art keywords
circuit
circuit board
resin
collective
upper plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9247449A
Other languages
Japanese (ja)
Other versions
JP3859318B2 (en
Inventor
Makoto Nagayama
誠 長山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Electronics Co Ltd
Original Assignee
Citizen Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Electronics Co Ltd filed Critical Citizen Electronics Co Ltd
Priority to JP24744997A priority Critical patent/JP3859318B2/en
Publication of JPH1174295A publication Critical patent/JPH1174295A/en
Application granted granted Critical
Publication of JP3859318B2 publication Critical patent/JP3859318B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Dicing (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for packaging electronic circuit which is suitable for reducing the size and thickness of a package and for increasing the number of electronic circuits to be packaged. SOLUTION: After the space in a molding frame 3 bonded to an integrated circuit board 1 mounted with circuit parts 2 is filled up with a resin 5, an integrated upper plate 12 is put on the frame 3 and the laminated body is diced along cutting lines 6. Since the resin 5 is held between the circuit board 1 and the upper plate 12, no warping occurs, and since the circuit components 2 are convered with the plate 12, the thickness of the resin 2 can be reduced to about the heights of the parts 2. A method in which the circuit board 1, the molding frame 3, and the upper plate 12 are bonded to each other in a box-like state and the resin 5 is injected into the space of the frame 3 or another method, in which plate 12 is put on the parts 2 and the peripheries of the plate, parts 2, and circuit board 1 are sealed with a tape and the resin 5 is injected into the space surrounded by the tape.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、回路基板上にIC
チップを始めとする小型の電子回路部品を実装し、樹脂
を注入して回路部品を樹脂中に埋設する電子回路モジュ
ールのパッケージ方法に関する。
The present invention relates to an integrated circuit (IC) on a circuit board.
The present invention relates to a method of packaging an electronic circuit module in which a small electronic circuit component such as a chip is mounted, a resin is injected, and the circuit component is embedded in the resin.

【0002】[0002]

【従来の技術】回路基板に各種の回路部品を搭載して一
定の機能を持つモジュールを構成する電子回路は、多様
な種類のものが現れるとともに小型化が進み、電子機器
に表面実装するのに適したものが普及しつつある。この
ような小型回路のパッケージとして、図4に示すのは発
明者らが従来から製造しているもので、寸法の一例を上
げれば縦横10mm以下、高さ5mm以下程度である。
図4(A)のものはそのB−B断面を同図(B)に示す
が、回路基板101にICチップ102やチップ抵抗、
チップ・コンデンサ等の回路部品103を実装し、回路
基板101周辺の一部または全部にモールド枠104を
接合し、その内側にエポキシ等の樹脂105を注入して
回路部品を埋設し、金属のシールド・ケース106を取
り付けたものである。シールド・ケース106に開けた
窓107は、回路中の光電素子のための光の通路であ
る。
2. Description of the Related Art There are various types of electronic circuits that constitute a module having a certain function by mounting various circuit components on a circuit board. Suitable ones are spreading. FIG. 4 shows a package of such a small circuit, which is conventionally manufactured by the inventors, and has a height of about 10 mm or less and a height of about 5 mm or less, for example.
FIG. 4 (A) shows a cross section taken along line BB of FIG. 4 (B).
A circuit component 103 such as a chip / capacitor is mounted, a mold frame 104 is joined to part or all of the periphery of the circuit board 101, and a resin 105 such as epoxy is injected into the inside of the mold frame 104 to embed the circuit component, and a metal shield is formed. -The case 106 is attached. A window 107 opened in the shield case 106 is a light passage for a photoelectric element in the circuit.

【0003】図4(C)も上記と同系統のパッケージ
で、そのD−D断面を同図(D)に示すが、回路基板1
01の両側に樹脂の乗ってない箇所108がある。この
パッケージにも金属のシールド・ケース106を取り付
けてある。
FIG. 4C also shows a package of the same type as the above, and its DD section is shown in FIG.
01 are located on both sides where no resin is loaded. This package also has a metal shield case 106 attached.

【0004】上記のような電子回路の製造は、多数の電
子回路となる領域を縦横に格子状に配置した集合回路基
板を用いて、各領域に回路部品を実装し、樹脂を注入し
て硬化させた後これを切断して個々の電子回路に分割す
ることにより能率よく行われる。図5にそのようなパッ
ケージ方法の一例を示す。
In the manufacture of electronic circuits as described above, circuit components are mounted in each area using a collective circuit board in which a large number of areas for electronic circuits are arranged in a matrix in a matrix, and a resin is injected and cured. After that, it is cut off and divided into individual electronic circuits for efficient operation. FIG. 5 shows an example of such a packaging method.

【0005】図5(A)にて、集合回路基板1には多数
の電子回路となる領域が配置してあり、各領域にそれぞ
れ回路部品2をチップ・マウンタ等によって実装する。
次に同図(B)にて、集合回路基板1の回路部品搭載面
に樹脂成形品のモールド枠3をエポキシ系接着剤などで
接合する。モールド枠3には個々の回路領域に対応する
多くの窓4が開けてあり、各領域の回路部品2はそれぞ
れこの窓の中に収まる。次いで同図(C)のようにモー
ルド枠3の各窓4に樹脂5を充填する。そして樹脂5を
硬化させた後、図5(D)のように各回路領域の境界線
である切断線6に沿って全体を縦横に切断するダイシン
グを行う。切断した各部分が個々の電子回路7となり、
必要に応じてシールド・ケースをつけて完成する。これ
は図4(A)、(B)の電子回路に相当するものであ
る。
In FIG. 5A, a large number of electronic circuit areas are arranged on a collective circuit board 1, and circuit components 2 are mounted in each area by a chip mounter or the like.
Next, in FIG. 1B, a mold frame 3 of a resin molded product is joined to the circuit component mounting surface of the collective circuit board 1 with an epoxy-based adhesive or the like. The mold frame 3 has many windows 4 corresponding to individual circuit regions, and the circuit components 2 in each region fit in the respective windows. Next, as shown in FIG. 3C, the resin 5 is filled in each window 4 of the mold frame 3. After the resin 5 is cured, dicing is performed to cut the entire length and width along a cutting line 6 which is a boundary of each circuit region as shown in FIG. Each cut part becomes an individual electronic circuit 7,
Complete with a shield case if necessary. This corresponds to the electronic circuit shown in FIGS.

【0006】図5のモールド枠3は窓4が格子状に設け
てあるが、窓4を各行または各列で一つにつないで短冊
形の窓にしたものを平行に配置してもよい。その場合、
図5(D)で切り離した電子回路7の平行な2辺にモー
ルド枠が残り、他の2辺はモールド枠がなく樹脂の切断
面となる。
Although the mold frame 3 shown in FIG. 5 has windows 4 provided in a lattice pattern, the windows 4 may be connected in one row or column to form a rectangular window and arranged in parallel. In that case,
The mold frame remains on two parallel sides of the electronic circuit 7 separated in FIG. 5D, and the other two sides have no mold frame and are cut surfaces of the resin.

【0007】図6に、集合回路基板に回路部品を実装し
樹脂をモールドした状態の断面図をいくつか示す。図6
(A)は図5のパッケージ方法のものである。図6
(B)は、樹脂、レジスト材等で作ったモールド・リブ
8を集合回路基板1に接合しておくもので、これは同図
(A)のモールド枠3よりも高さが低く、樹脂の根元の
部分で領域を定めている。このような背の低いモールド
・リブ8は樹脂が硬化した後に剥して除去することがあ
り、その場合、電子回路は図4(C)のように基板上に
樹脂のない部分108があるものとなる。図6(C)で
はモールド枠やリブを用いず、樹脂成形用の金型9によ
って樹脂をモールドする。回路部品の実装後、金型9を
回路基板1に当接させ、各回路領域に対応するキャビテ
ィ10に樹脂5を注入して回路部品2を封入する。この
方法によるパッケージは完成品にモールド枠が残らず、
図4(C)、(D)に相当するものとなる。
FIG. 6 shows several cross-sectional views of a state where circuit components are mounted on a collective circuit board and resin is molded. FIG.
(A) is of the packaging method of FIG. FIG.
(B) shows a case in which a mold rib 8 made of resin, resist material or the like is bonded to the collective circuit board 1, which is lower in height than the mold frame 3 in FIG. The area is defined at the root. Such a short mold rib 8 may be peeled off after the resin is cured, and in this case, the electronic circuit is assumed to have a resin-free portion 108 on the substrate as shown in FIG. Become. In FIG. 6C, the resin is molded using a resin molding die 9 without using a mold frame or ribs. After the circuit components are mounted, the mold 9 is brought into contact with the circuit board 1, and the resin 5 is injected into the cavities 10 corresponding to the respective circuit regions, thereby enclosing the circuit components 2. The package by this method does not leave the mold frame in the finished product,
This corresponds to FIGS. 4C and 4D.

【0008】[0008]

【発明が解決しようとする課題】上述の電子回路のパッ
ケージ方法は次の点で改良の余地がある。すなわち、図
6の断面図に見るように、これらはいずれも集合回路基
板1の一方の面、すなわち部品の実装面だけに樹脂を乗
せた構造であり、硬化に伴う樹脂の収縮などによって集
合回路基板1に反りを生じる傾向がある。図6(A)、
図6(B)のようにモールド枠3やモールド・リブ8を
集合回路基板1に接合したり、図6(C)のように金型
9に壁11を設けて集合回路基板1に樹脂を充填しない
部分を残すのは、基板の反りを押さえるためであるが、
モールド枠や樹脂のない部分が集合回路基板上で一定の
面積を占めるから、製品の小型化や多数個取りによる取
り個数を制限する要因となる。しかし、みだりにモール
ド枠や樹脂のない部分を省くと基板の反りを招く。
The above-mentioned electronic circuit packaging method has room for improvement in the following points. That is, as shown in the cross-sectional view of FIG. 6, each of these is a structure in which the resin is placed only on one surface of the integrated circuit board 1, that is, the mounting surface of the components, and the integrated circuit board is shrunk by curing and the like. The substrate 1 tends to warp. FIG. 6 (A),
As shown in FIG. 6B, the mold frame 3 and the mold rib 8 are joined to the collective circuit board 1, or as shown in FIG. The reason why the unfilled part is left is to suppress the warpage of the substrate.
Since the portion without the mold frame and the resin occupies a certain area on the collective circuit board, this is a factor that limits the size reduction of products and the number of products to be manufactured by multi-cavity. However, if the portions without the mold frame and the resin are omitted, the substrate is warped.

【0009】また、樹脂の引けや高さのばらつきによっ
て回路部品が露出することを防ぎ、回路部品を樹脂中で
確実に保護するために、回路部品の高さに対し樹脂の厚
さに多少の余裕を設けねばならず、製品の薄型化が制限
される。本発明はこれらの問題を解決して、小型、薄型
化や多数個取りによる取り個数の増量に適する電子回路
のパッケージ方法を提供するものである。
Further, in order to prevent the circuit components from being exposed due to resin shrinkage and variations in height, and to protect the circuit components securely in the resin, the thickness of the resin is slightly increased with respect to the height of the circuit components. A margin must be provided, and the reduction in thickness of the product is limited. SUMMARY OF THE INVENTION The present invention solves these problems and provides a method of packaging an electronic circuit that is suitable for miniaturization, thinning, and increasing the number of pieces to be taken.

【0010】[0010]

【課題を解決するための手段】本発明の電子回路のパッ
ケージ方法は、回路部品を実装した回路基板を上板で覆
い、回路基板と上板の間に封止用の樹脂を充填し硬化さ
せて全体を一体化するものである。すなわち、回路基板
と上板が回路部品を封入した樹脂層をサンドイッチ状に
挟持するから、これまでのように回路基板の片面側だけ
に樹脂があるものと違って、回路基板の反りが確実に防
がれる。
According to a method of packaging an electronic circuit of the present invention, a circuit board on which circuit components are mounted is covered with an upper plate, and a sealing resin is filled between the circuit board and the upper plate and cured to cure. Are integrated. In other words, since the circuit board and the upper plate sandwich the resin layer enclosing the circuit components in a sandwich shape, unlike the conventional case where there is resin only on one side of the circuit board, the warpage of the circuit board is ensured. Can be prevented.

【0011】具体的方法として、切り離して多数の回路
基板にするための集合回路基板の各回路領域に、それぞ
れ回路部品を実装し、集合回路基板の周囲に額縁状のモ
ールド枠を接着してモールド枠内に樹脂を注入し、集合
回路基板と同程度の大きさの集合上板を載せて樹脂を硬
化させ全体を接合する。そして各回路領域を区分する切
断線に沿ってダイシングすることにより電子回路のパッ
ケージを得るのである。
As a specific method, a circuit component is mounted on each circuit area of a collective circuit board for separating into a large number of circuit boards, and a frame-shaped mold frame is adhered around the collective circuit board to form a mold. A resin is poured into the frame, and an assembly upper plate having a size similar to that of the assembly circuit board is placed thereon, and the resin is cured to bond the entire assembly. Then, the package of the electronic circuit is obtained by dicing along the cutting line dividing each circuit region.

【0012】別の方法として、集合回路基板に接着する
モールド枠として、3辺が閉じて1辺が開いているも
の、あるいは1辺の一部に途切れた箇所を設けたものを
集合回路基板に接着し、この上に集合上板を接着して箱
状にし、モールド枠の途切れた部分である注入口から樹
脂を注入して硬化させ、各回路領域を区分する切断線に
沿ってダイシングする。
As another method, as a mold frame to be adhered to the collective circuit board, a mold frame having three closed sides and one open side, or a mold frame provided with a discontinuous part in one side is provided on the collective circuit board. The top plate of the assembly is adhered thereon to form a box shape, and a resin is injected from an injection port, which is a discontinuous portion of the mold frame, and cured, and diced along a cutting line that divides each circuit region.

【0013】さらに別の方法では、集合回路基板に実装
した回路部品に集合上板を当接させて乗せる。つまり回
路部品のうちもっとも背の高いものを集合回路基板と集
合上板の間隔を決めるスペーサに用いる。このように集
合回路基板と集合上板を重ねておいて、周囲を封止テー
プで封止する。ただし周囲を全部ふさがず、一部、樹脂
の注入口として開けておく。そして注入口から樹脂を注
入して硬化させ、各回路領域を区分する切断線に沿って
ダイシングする。
In still another method, an assembly upper plate is put on a circuit component mounted on an assembly circuit board in contact with the circuit component. That is, the tallest of the circuit components is used as a spacer for determining the distance between the collective circuit board and the collective upper plate. In this way, the assembly circuit board and the assembly upper plate are stacked, and the periphery is sealed with a sealing tape. However, do not cover the entire area, but leave a part of it open as a resin inlet. Then, a resin is injected from an injection port to be cured, and dicing is performed along a cutting line for dividing each circuit region.

【0014】上板には絶縁材を用いるなり、あるいは回
路部品の表面が十分に絶縁されていて短絡の恐れがない
ならば、金属板を用いるなりする。絶縁塗装した金属板
を用いたり、絶縁材の上板に金属層を重ねるなりしても
よく、このように金属板や金属層を設けることにより遮
蔽機能が得られ、従来のようなシールド・ケースを用い
なくとも信頼性が保たれる。
An insulating material is used for the upper plate, or a metal plate is used if the surface of the circuit component is sufficiently insulated and there is no danger of short circuit. A metal plate coated with insulation may be used, or a metal layer may be overlaid on the upper plate of the insulating material.By providing such a metal plate or metal layer, a shielding function can be obtained, and a shield case as in the past can be obtained. The reliability is maintained without the use of.

【0015】[0015]

【発明の実施の形態】以下、図面に基づいて本発明の実
施形態を説明する。図1は、本発明による電子回路のパ
ッケージ方法の第1の実施形態を示す。図1(A)に
て、1は集合回路基板で個々の電子回路の基板となる領
域を多数含んでおり、チップ・マウンタによって各領域
にそれぞれ回路部品2を実装する。3は樹脂製のモール
ド枠で額縁状であり、これを接着剤で集合回路基板1に
接着する。次に同図(B)にて、モールド枠3の内側に
樹脂5を注入して回路部品を樹脂5中に封入する。次に
同図(C)にて、接着剤で集合上板12をモールド枠3
上に接着し、樹脂5を硬化させて集合回路基板1、モー
ルド枠3および集合上板12の全体を接合する。これを
同図(D)に示すように各回路領域の境界線である切断
線6に沿ってダイシングすれば、1枚の集合回路基板1
からパッケージされた電子回路7が多数個取りされる。
モールド枠3は厚さが回路部品の中で最も背の高いもの
と同じかそれよりやや厚い程度であればよい。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of a method for packaging an electronic circuit according to the present invention. In FIG. 1 (A), reference numeral 1 denotes a collective circuit board, which includes a large number of regions serving as substrates for individual electronic circuits, and a circuit component 2 is mounted in each region by a chip mounter. Reference numeral 3 denotes a resin-made frame having a frame shape, which is bonded to the collective circuit board 1 with an adhesive. Next, in FIG. 2B, a resin 5 is injected into the inside of the mold frame 3 to enclose the circuit components in the resin 5. Next, in FIG. 3 (C), the assembly upper plate 12 is attached to the mold frame 3 with an adhesive.
Then, the resin 5 is cured and the collective circuit board 1, the mold frame 3, and the collective upper plate 12 are joined together. When this is diced along a cutting line 6 which is a boundary line of each circuit region as shown in FIG.
A large number of packaged electronic circuits 7 are taken.
The mold frame 3 may have a thickness equal to or slightly larger than the tallest of the circuit components.

【0016】図2は本発明の第2の実施形態である。ま
ず、同図(A)のように回路部品2を実装した集合回路
基板1、モールド枠3、それから集合上板12を接着剤
で一体に接合する。この実施形態ではモールド枠3は4
辺が閉じたものでなく、1辺がなくて開口しているもの
を用いる。図2(B)の左側はこうして箱型に接合した
ものを立てた様子で、モールド枠3が上辺で開口してい
る箇所は樹脂の注入口13となる。モールド枠3は一辺
を全部除くのでなく、同図の右側のもののように、上辺
の一部に途切れた箇所を設けて注入口13にしてもよ
い。同図(C)のように注入口13から樹脂5を注入し
て箱の内部を充填する。樹脂5を硬化させて切断線6に
沿ってダイシングすれば、多数の電子回路パッケージが
得られる。
FIG. 2 shows a second embodiment of the present invention. First, as shown in FIG. 1A, the collective circuit board 1 on which the circuit components 2 are mounted, the mold frame 3, and the collective upper plate 12 are integrally joined with an adhesive. In this embodiment, the mold frame 3 is 4
A closed side is used instead of a closed side. The left side of FIG. 2 (B) is a state in which the box-shaped joint is set up, and the portion where the mold frame 3 is opened on the upper side is the resin injection port 13. The mold frame 3 may not be entirely removed, but may be provided with a discontinuous portion at a part of the upper side as the injection port 13 as shown on the right side of FIG. The resin 5 is injected from the injection port 13 as shown in FIG. If the resin 5 is cured and diced along the cutting line 6, a large number of electronic circuit packages can be obtained.

【0017】図3は本発明の第3の実施形態で、この方
法では先の二つの実施形態のようにモールド枠を用いる
ことをしない。同図(A)にて、集合回路基板1に実装
した回路部品2の上に集合上板12を重ねる。これを側
面から見た状態を同図(A′)に示すが、集合上板12
は下面が回路部品2のうち一番背の高いものに接して乗
っており、回路部品2を集合回路基板1と集合上板12
の間隔を決めるスペーサに使っているのである。ワイヤ
・ボンディングしたICチップはスペーサに適しない
が、通常、電子回路はこれよりも背の高い回路部品を含
んでいる。次にこのように重ねた集合回路基板1と集合
上板12の周囲を、図3(B)に示すように注入口13
を残して粘着性テープ等の封止テープ14で封止する。
同図(C)のように注入口13から樹脂5を注入して内
部を充填し、樹脂5を硬化させて封止テープ14を剥
し、切断線6に沿ってダイシングする。
FIG. 3 shows a third embodiment of the present invention. In this method, a mold frame is not used as in the above two embodiments. In FIG. 1A, an assembly upper plate 12 is superimposed on the circuit component 2 mounted on the assembly circuit board 1. FIG. 7A shows the state when viewed from the side.
Has a lower surface in contact with the tallest one of the circuit components 2, and the circuit component 2 is connected to the collective circuit board 1 and the collective upper plate 12.
It is used as a spacer to determine the distance between the two. Wire-bonded IC chips are not suitable for spacers, but electronic circuits typically include taller circuit components. Next, as shown in FIG. 3B, the periphery of the assembled circuit board 1 and the assembled upper plate 12 thus overlapped with each other is
Is sealed with a sealing tape 14 such as an adhesive tape.
As shown in FIG. 2C, the resin 5 is injected from the injection port 13 to fill the inside, the resin 5 is cured, the sealing tape 14 is peeled off, and dicing is performed along the cutting line 6.

【0018】集合上板12は、絶縁材であれば短絡を起
こしたりせずに下面を回路部品2に当接させることがで
きる。製品の薄型化のため、強度の許す範囲で極力薄手
の材料(例えば0.1mm前後)を用いる。モジュール
の機能によってはフォト・トランジスタ、フォト・ダイ
オード、LED等の受光、発光の光電素子を含むから、
その場合は集合上板12は光を通すことが必要で、光の
強度に応じて透明または半透明の樹脂材料等を用いる。
しかし他方に遮光を要する回路部品があるなら、その箇
所は集合上板12にマスク印刷などを施しておく。
If the upper plate 12 is made of an insulating material, the lower surface thereof can be brought into contact with the circuit component 2 without causing a short circuit. In order to make the product thinner, a material as thin as possible (for example, about 0.1 mm) is used as far as the strength allows. Depending on the function of the module, photo-transistors, photo-diodes, LEDs and other light-receiving and light-emitting photoelectric elements are included.
In this case, the upper assembly plate 12 needs to transmit light, and a transparent or translucent resin material or the like is used depending on the intensity of the light.
However, if there is a circuit component that requires light shielding on the other side, that portion is subjected to mask printing or the like on the assembly upper plate 12.

【0019】回路部品2の表面が十分に絶縁性であれば
集合上板12を金属板にでき、金属上板からはシールド
作用が得られる。シールド作用の安定のために金属の上
板を回路基板の接地パターンに接続するには、例えば接
地パターン上に接地用のばね片や導電エラストマ等を置
いて上板の下面に当接させるなどの構造を取ることがで
きる。金属上板は、シールド作用以外にも遮光性や放熱
性に優れるという利点がある。金属上板の下面を絶縁塗
装などして回路部品に当接させてもよい。金属上板を接
地するには、下面の絶縁被覆を一部省き、ここに前記の
接地用ばね片等が当接するようにする。
If the surface of the circuit component 2 is sufficiently insulative, the collecting upper plate 12 can be made of a metal plate, and a shielding action can be obtained from the metal upper plate. In order to connect the metal upper plate to the ground pattern of the circuit board to stabilize the shielding action, for example, a spring piece for grounding or a conductive elastomer may be placed on the ground pattern and brought into contact with the lower surface of the upper plate. Can take structure. The metal upper plate has an advantage of being excellent in light-shielding properties and heat dissipation properties in addition to the shielding effect. The lower surface of the metal upper plate may be brought into contact with the circuit component by applying insulation coating or the like. In order to ground the metal upper plate, a part of the insulating coating on the lower surface is omitted, and the grounding spring piece or the like is brought into contact with the insulating cover.

【0020】以上、本発明の実施形態をいくつか示した
が、これらで見たようなモールド枠3や封止テープ14
を使わず、治具や取り付け具を用いて本発明の方法を行
うこともできる。詳細は省くが、例えば図1の方法の場
合、集合回路基板1の周囲に樹脂注入のための壁を設け
るのにモールド枠3を接合するのでなく、周囲に壁のあ
る箱状の治具の中に集合回路基板1を置いて樹脂を注入
し、集合上板12を乗せる方法でもよい。あるいは図2
や図3の方法の場合、上方が開いた「コ」の字型の治具
に集合回路基板1と集合上板12を取り付けることによ
って周辺の3方をふさぎ、開口部から樹脂を注入、硬化
させてもよい。治具の幅を増せば1個の治具に集合回路
基板1と集合上板12を何組も平行に取り付けられるか
ら、能率よく回路のパッケージを行える。このような方
法も本発明の範囲内である。
Although the embodiments of the present invention have been described above, the mold frame 3 and the sealing tape 14 as seen in these embodiments have been described.
The method of the present invention can also be performed using a jig or a fixture without using the method. Although details are omitted, for example, in the case of the method of FIG. 1, instead of joining the mold frame 3 to provide a wall for resin injection around the collective circuit board 1, a box-shaped jig having a wall around it is used. A method may be used in which the collective circuit board 1 is placed inside, resin is injected, and the collective upper plate 12 is placed thereon. Or Figure 2
In the case of the method of FIG. 3 or FIG. 3, the peripheral circuit is closed by attaching the collective circuit board 1 and the collective upper plate 12 to a jig having a U-shape with an open top, and resin is injected from the opening and cured. May be. If the width of the jig is increased, a number of sets of the collective circuit board 1 and the collective upper plate 12 can be mounted in parallel on one jig, so that the circuit can be packaged efficiently. Such methods are also within the scope of the present invention.

【0021】[0021]

【発明の効果】本発明による電子回路のパッケージ方法
によれば、樹脂が回路基板と上板で挟まれているので、
電子回路を多数個取りする面積の大きな集合回路基板を
用いる製造方法において基板の反りを防ぐことができ、
加工精度や歩留まりが向上する。ダイシングして完成し
た電子回路は周囲が樹脂面であってモールド枠を含ま
ず、樹脂の乗ってない基板領域もないから製品の面積を
小さくでき、1枚の集合回路基板からの電子回路の取り
個数が増えて製造コストが下がる。電子回路が上板で保
護されているので、従来使えなかったような柔らかい樹
脂を使うことが可能になって生産性が上がり、また、電
子回路の用途や雰囲気に応じて最適の樹脂を選ぶことが
できて製品の信頼性が高まる。回路基板と上板の間隔は
モールド枠や回路部品をスペーサにして定まるから、製
品の高さのばらつきがなくなりパッケージの厚さを薄く
できる。更に、製品の上面がフラットな上板で構成され
ているためマウンターによるマウントを確実にすること
ができる。従って、電子機器への実装が容易になる。こ
のように本発明の電子回路のパッケージ方法は電子回路
の生産性の向上と小型化、薄型化を可能にし、ひいては
このような回路を用いた電子機器の低廉化、小型化に寄
与する。
According to the electronic circuit packaging method of the present invention, since the resin is sandwiched between the circuit board and the upper plate,
In a manufacturing method using a large collective circuit board having a large area for taking a large number of electronic circuits, it is possible to prevent warpage of the board,
Processing accuracy and yield are improved. The electronic circuit completed by dicing has a resin surface around it and does not include a mold frame, and there is no substrate area on which resin is not mounted. Therefore, the area of the product can be reduced, and the electronic circuit can be obtained from one integrated circuit board. The number increases and the manufacturing cost decreases. Since the electronic circuit is protected by the upper plate, it is possible to use a soft resin that could not be used before, increasing productivity, and selecting the optimal resin according to the application and atmosphere of the electronic circuit To increase the reliability of the product. Since the distance between the circuit board and the upper plate is determined by using the mold frame and the circuit components as spacers, there is no variation in the height of the product, and the thickness of the package can be reduced. Further, since the upper surface of the product is formed of a flat upper plate, mounting by the mounter can be ensured. Therefore, mounting on an electronic device becomes easy. As described above, the method of packaging an electronic circuit according to the present invention enables the improvement of the productivity of the electronic circuit and the miniaturization and thinning of the electronic circuit, thereby contributing to the cost reduction and miniaturization of the electronic device using such a circuit.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の電子回路のパッケージ方法の一実施形
態の手順を示す斜視図である。
FIG. 1 is a perspective view showing a procedure of an embodiment of an electronic circuit packaging method according to the present invention.

【図2】本発明の電子回路のパッケージ方法の別の実施
形態の手順を示す斜視図である。
FIG. 2 is a perspective view showing a procedure of another embodiment of the electronic circuit packaging method of the present invention.

【図3】本発明の電子回路のパッケージ方法のさらに別
の実施形態の手順を示す斜視図である。
FIG. 3 is a perspective view showing a procedure of still another embodiment of the electronic circuit packaging method of the present invention.

【図4】従来の電子回路のパッケージで、図(A)、
(C)はそれぞれ外観図、図(B)、(D)はそれぞれ
図(A)、(C)のB−B断面図、D−D断面図であ
る。
FIG. 4 shows a conventional electronic circuit package, as shown in FIG.
(C) is an external view, and FIGS. (B) and (D) are a BB sectional view and a DD sectional view of FIGS. (A) and (C), respectively.

【図5】従来の電子回路のパッケージ方法の手順を示す
斜視図である。
FIG. 5 is a perspective view showing a procedure of a conventional electronic circuit packaging method.

【図6】従来の電子回路のパッケージ方法において、回
路部品を実装した集合回路基板に樹脂をモールドした状
態を示す断面図である。
FIG. 6 is a cross-sectional view showing a state in which a resin is molded on a collective circuit board on which circuit components are mounted in a conventional electronic circuit packaging method.

【符号の説明】[Explanation of symbols]

1 集合回路基板 2、103 回路部品 3、104 モールド枠 5、105 樹脂 6 切断線 7 電子回路 8 モールド・リブ 9 金型 12 集合上板 13 注入口 14 封止テープ 101 回路基板 102 ICチップ 106 シールド・ケース DESCRIPTION OF SYMBOLS 1 Assembly circuit board 2, 103 Circuit component 3, 104 Mold frame 5, 105 Resin 6 Cutting line 7 Electronic circuit 8 Mold rib 9 Die 12 Assembly upper plate 13 Injection 14 Sealing tape 101 Circuit board 102 IC chip 106 Shield ·Case

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 集合回路基板に設けた複数の回路領域に
それぞれ回路部品を実装し、集合回路基板の周辺を壁で
囲んでその内側に樹脂を注入し、その上に集合上板を乗
せて樹脂を硬化させ集合回路基板と樹脂層と集合上板を
一体化した後、これを各回路領域別に切断することによ
り回路部品を樹脂に封入して回路基板と上板で挟持した
構造を得る電子回路のパッケージ方法。
1. A circuit component is mounted on each of a plurality of circuit regions provided on a collective circuit board, a resin is injected into the inside of a wall surrounding the collective circuit board, and a collective upper plate is placed thereon. After the resin is cured and the integrated circuit board, the resin layer, and the upper board are integrated, the circuit board is cut into individual circuit regions to enclose the circuit components in the resin and obtain a structure in which the circuit board and the upper board are sandwiched. How to package the circuit.
【請求項2】 請求項1に記載の電子回路のパッケージ
方法において、集合回路基板の周辺を囲む壁は、集合回
路基板に額縁状のモールド枠を接着して設ける電子回路
のパッケージ方法。
2. The method of packaging an electronic circuit according to claim 1, wherein a wall surrounding the periphery of the collective circuit board is provided by bonding a frame-shaped mold frame to the collective circuit board.
【請求項3】 集合回路基板に設けた複数の回路領域に
それぞれ回路部品を実装し、回路部品に当接または僅か
の間隔をおいて集合上板を配置し、集合回路基板と集合
上板の周囲を樹脂の注入口を残して封止し、注入口から
樹脂を注入し硬化させて集合回路基板と樹脂層と集合上
板を一体化した後、これを各回路領域別に切断すること
により回路部品を樹脂中に封入して回路基板と上板で挟
持した構造を得る電子回路のパッケージ方法。
3. A circuit component is mounted on each of a plurality of circuit areas provided on the collective circuit board, and the collective circuit board and the collective circuit board are disposed in contact with or at a slight distance from the circuit component. After sealing the periphery, leaving the resin injection port, injecting the resin from the injection port and curing it to integrate the collective circuit board, resin layer, and collective upper plate, and then cutting this for each circuit area A method of packaging an electronic circuit in which components are encapsulated in resin to obtain a structure sandwiched between a circuit board and an upper plate.
【請求項4】 請求項3に記載の電子回路のパッケージ
方法において、集合回路基板と集合上板の周囲の封止
は、両者の間に注入口を設けたモールド枠を挟んで接合
することによる電子回路のパッケージ方法。
4. The method of packaging an electronic circuit according to claim 3, wherein sealing around the collective circuit board and the collective upper plate is performed by sandwiching a mold frame having an injection port therebetween. Electronic circuit packaging method.
【請求項5】 請求項3に記載の電子回路のパッケージ
方法において、集合回路基板と集合上板の周囲の封止
は、集合上板を回路部品に当接させて集合回路基板と集
合上板の間隔を定め、注入口を残してテープ材で周囲を
封止することによる電子回路のパッケージ方法。
5. The method for packaging an electronic circuit according to claim 3, wherein the sealing around the collective circuit board and the collective upper board is performed by bringing the collective upper board into contact with a circuit component. A method of packaging an electronic circuit by defining an interval between the two and sealing the periphery with a tape material leaving an injection port.
JP24744997A 1997-08-29 1997-08-29 Electronic circuit packaging method Expired - Lifetime JP3859318B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24744997A JP3859318B2 (en) 1997-08-29 1997-08-29 Electronic circuit packaging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24744997A JP3859318B2 (en) 1997-08-29 1997-08-29 Electronic circuit packaging method

Publications (2)

Publication Number Publication Date
JPH1174295A true JPH1174295A (en) 1999-03-16
JP3859318B2 JP3859318B2 (en) 2006-12-20

Family

ID=17163617

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Application Number Title Priority Date Filing Date
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Country Link
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