JPH1167994A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH1167994A JPH1167994A JP10133428A JP13342898A JPH1167994A JP H1167994 A JPH1167994 A JP H1167994A JP 10133428 A JP10133428 A JP 10133428A JP 13342898 A JP13342898 A JP 13342898A JP H1167994 A JPH1167994 A JP H1167994A
- Authority
- JP
- Japan
- Prior art keywords
- resin layer
- heat
- polyimide resin
- epoxy resin
- polyimide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置、特にリー
ドフレームを放熱板に固定した構造を備え且つ放熱特性
に優れた半導体装置の製造方法に関連する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a structure in which a lead frame is fixed to a heat sink and having excellent heat dissipation characteristics.
【０００２】[0002]
【従来の技術】図３は、半導体素子（8）を載置したリ
ードフレーム組立体（1）と金属放熱板（2）との間に薄
い絶縁層（4）を形成して、リードフレーム組立体（1）
と金属製の放熱板（2）とを樹脂封止体（3）により一体
に樹脂封止した従来の半導体装置を示す。放熱板（2）
は相対的に厚いが、樹脂封止体（3）の一部として形成
される樹脂層（4）は薄く形成される。リードフレーム
組立体（1）は、支持板（5）と外部リード（6）とを有
し且つ相対的に肉薄のリードフレーム（7）と、周知の
ダイボンディングでリードフレーム（7）の上面に実装
された半導体素子（8）と、ワイヤボンディングで半導
体素子（8）の電極と支持板（5）等との間に接続された
リード細線（9）とを備える。リードフレーム（7）はプ
レス成形された金属板である。図３に示す半導体装置で
は、半導体素子（8）は作動時に発熱するから、リード
フレーム（7）と放熱板（2）の間に樹脂層（4）を極力
薄く形成して、樹脂層（4）を通じて半導体素子（8）の
熱を放熱板（2）に効率的に伝達し、放熱板（2）から外
部に十分に放熱させることが望ましい。2. Description of the Related Art FIG. 3 shows a lead frame assembly in which a thin insulating layer (4) is formed between a lead frame assembly (1) on which a semiconductor element (8) is mounted and a metal heat sink (2). Three-dimensional (1)
1 shows a conventional semiconductor device in which a metal heat sink (2) and a metal heat radiating plate (2) are integrally resin-sealed by a resin sealing body (3). Heat sink (2)
Is relatively thick, but the resin layer (4) formed as a part of the resin sealing body (3) is formed thin. The lead frame assembly (1) has a support plate (5) and external leads (6) and has a relatively thin lead frame (7), and is mounted on the upper surface of the lead frame (7) by well-known die bonding. The semiconductor device includes a mounted semiconductor element (8) and a lead wire (9) connected between an electrode of the semiconductor element (8) and a support plate (5) by wire bonding. The lead frame (7) is a pressed metal plate. In the semiconductor device shown in FIG. 3, since the semiconductor element (8) generates heat during operation, the resin layer (4) is formed as thin as possible between the lead frame (7) and the radiator plate (2). ), It is desirable that the heat of the semiconductor element (8) is efficiently transmitted to the heat radiating plate (2) so that the heat is sufficiently radiated from the heat radiating plate (2) to the outside.
【０００３】[0003]
【発明が解決しようとする課題】ところで、従来の半導
体装置では、製造の際に成形金型のキャビティ内に個別
に離間させて配置したリードフレーム組立体（1）と放
熱板（2）との間に樹脂を注入して樹脂層（4）を形成す
る。リードフレーム組立体（1）と放熱板（2）との間で
ボイド等の未充填部分の形成を防止するため、リードフ
レーム組立体（1）と放熱板（2）との間に流動化した樹
脂を十分な量で圧入しなければならない。このため、リ
ードフレーム組立体（1）と放熱板（2）との間は少なく
とも０.５ｍｍ程度の間隔が必要であるから、樹脂層
（4）の薄肉化には限界があり、樹脂層（4）の熱伝達特
性を十分に改善することは困難であった。By the way, in a conventional semiconductor device, a lead frame assembly (1) and a heat radiating plate (2) which are individually and separately arranged in a cavity of a molding die at the time of manufacturing are used. A resin is injected in between to form a resin layer (4). Fluidized between the lead frame assembly (1) and the heat sink (2) to prevent the formation of unfilled parts such as voids between the lead frame assembly (1) and the heat sink (2) The resin must be pressed in a sufficient amount. For this reason, a gap of at least about 0.5 mm is required between the lead frame assembly (1) and the heat sink (2), and there is a limit in reducing the thickness of the resin layer (4). It was difficult to sufficiently improve the heat transfer characteristics of 4).
【０００４】この問題を解決するため、接着性を有する
エポキシ系樹脂等の絶縁性樹脂でリードフレーム組立体
（1）と放熱板（2）とを予め一体化した後、樹脂封止す
る構造が提案された。しかし、この構造では、ボイドが
生ぜず且つ放熱性を低下させない程度の薄い層厚で樹脂
層を形成することが困難であり、また、絶縁性樹脂の吸
湿性が大きいため、絶縁耐圧に欠ける難点があった。In order to solve this problem, a structure in which the lead frame assembly (1) and the radiator plate (2) are previously integrated with an insulating resin such as an epoxy resin having an adhesive property, and then resin-sealed. was suggested. However, in this structure, it is difficult to form a resin layer with a thin layer thickness that does not cause voids and does not reduce heat dissipation, and the insulating resin has a large hygroscopic property, and thus has a disadvantage of lacking in withstand voltage. was there.
【０００５】そこで、本発明はリードフレーム組立体と
放熱板との間に高い放熱特性を有する樹脂層を形成でき
る半導体装置の製造方法を提供することを目的とする。Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a resin layer having high heat radiation characteristics between a lead frame assembly and a heat radiation plate.
【０００６】[0006]
【課題を解決するための手段】本発明による半導体装置
の製造方法は、半導体素子（8）を一方の主面（5a）上
に載置した金属製の支持板（5）を有するリードフレー
ム組立体（1）と、金属製の放熱板（2）とを用意する工
程と、結晶シリカ（13）を含有するポリイミド系樹脂
（14）を放熱板（2）の一方の主面（2a）上に印刷した
後、熱処理を施してポリイミド系樹脂層（11）を形成す
る工程と、ポリイミド系樹脂層（11）の上面に接着性の
エポキシ系樹脂を印刷した後、エポキシ系樹脂を介して
放熱板（2）とリードフレーム組立体（1）の支持板
（5）の他方の主面（5b）とを貼着する工程と、エポキ
シ系樹脂に熱処理を施してエポキシ系樹脂層（12）を形
成すると同時に、ポリイミド系樹脂層（11）に生ずるボ
イド等の未充填部にエポキシ系樹脂を充填する工程とを
含む。本発明の実施例では、ポリイミド系樹脂層（11）
に１０〜５０μｍの平均粒径を有する３０〜６０重量％
の結晶シリカを混入する工程又は支持板（5）を外部リ
ード（6）に電気的に接続し、支持板（5）、半導体素子
（8）、放熱板（2）の一方の主面（2a）及び一方の主面
（2a）に対して直角な側面（2b）並びに外部リード
（6）の内端部（6a）を樹脂封止体（3）により封止する
工程を含んでもよい。ポリイミド系樹脂層（11）はエポ
キシ系樹脂層（12）よりも層厚である。A method of manufacturing a semiconductor device according to the present invention comprises a lead frame assembly having a metal support plate (5) having a semiconductor element (8) mounted on one main surface (5a). A step of preparing a solid (1) and a metal heat radiating plate (2); and a step of preparing a polyimide resin (14) containing crystalline silica (13) on one main surface (2a) of the heat radiating plate (2). And then heat-treat to form a polyimide resin layer (11), and after printing an adhesive epoxy resin on the upper surface of the polyimide resin layer (11), radiate heat through the epoxy resin Bonding the plate (2) and the other main surface (5b) of the support plate (5) of the lead frame assembly (1), and applying a heat treatment to the epoxy resin to form an epoxy resin layer (12). At the same time as forming, epoxy resin is applied to unfilled parts such as voids generated in polyimide resin layer (11). And a step of Hama. In the embodiment of the present invention, the polyimide resin layer (11)
30 to 60% by weight having an average particle size of 10 to 50 μm
Or electrically connecting the support plate (5) to the external leads (6), and connecting one of the main surfaces (2a) of the support plate (5), the semiconductor element (8), and the heat sink (2). ) And a side surface (2b) perpendicular to one main surface (2a) and an inner end portion (6a) of the external lead (6) may be sealed with a resin sealing body (3). The polyimide resin layer (11) is thicker than the epoxy resin layer (12).
【０００７】[0007]
【作用】熱処理されたエポキシ系樹脂層（12）は、ポリ
イミド系樹脂層（11）に生ずるボイド等の未充填部に侵
入してこれを充填しているため、ボイドのない均一な層
厚でポリイミド系樹脂層（11）を形成することができる
と共に、絶縁性樹脂層（10）の嵩密度が増加して絶縁性
樹脂層（10）の熱伝導性及び機械的強度が増加する作用
がある。また、放熱板（2）とエポキシ系樹脂層（12）
との間に配置されたポリイミド系樹脂層（11）は１０〜
５０μｍの平均粒径を有する結晶シリカを含むため、ポ
リイミド系樹脂層（11）を薄く形成でき、必要な絶縁耐
圧を得ると同時に、支持板（5）の一方の主面（5a）に
固着された半導体素子（8）から発生する熱を結晶シリ
カを通じて効率良く放熱板（2）に伝達することができ
る。この場合に、ポリイミド系樹脂層（11）は熱伝導性
のよい３０〜６０重量％の結晶シリカを含有するため、
絶縁性樹脂層（10）の熱伝導性は一層良好となる。The heat-treated epoxy resin layer (12) penetrates and fills unfilled portions such as voids generated in the polyimide resin layer (11), so that it has a uniform layer thickness without voids. The polyimide resin layer (11) can be formed, and the bulk density of the insulating resin layer (10) increases and the thermal conductivity and mechanical strength of the insulating resin layer (10) increase. . The heat sink (2) and the epoxy resin layer (12)
And the polyimide resin layer (11) disposed between
Since it contains crystalline silica having an average particle size of 50 μm, the polyimide-based resin layer (11) can be formed thinly, obtain a required dielectric strength voltage, and be fixed to one main surface (5a) of the support plate (5). The heat generated from the semiconductor element (8) can be efficiently transmitted to the heat sink (2) through the crystalline silica. In this case, since the polyimide resin layer (11) contains 30 to 60% by weight of crystalline silica having good thermal conductivity,
The thermal conductivity of the insulating resin layer (10) is further improved.
【０００８】[0008]
【実施例】以下、本発明による半導体装置の製造方法の
一実施例を図１及び図２について説明する。これらの図
面では、図３に示す箇所と同一の部分には同一の符号を
付し、説明を省略する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to FIGS. In these drawings, the same portions as those shown in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted.
【０００９】図１及び図２に示すように、ポリイミド系
樹脂層（11）とエポキシ系樹脂層（12）との２層から成
る絶縁性樹脂層（10）を介して支持板の他方の主面（5
b）と金属製の放熱板（2）とを固着した点で本実施例の
半導体装置は従来例と異なる。また、ポリイミド系樹脂
層（11）は、特定の平均粒径及び含有率を有する粒状の
結晶シリカ（13）をフィラーとして含有する点に特徴が
ある。As shown in FIG. 1 and FIG. 2, the other main plate of the support plate is interposed via an insulating resin layer (10) composed of two layers, a polyimide resin layer (11) and an epoxy resin layer (12). Face (5
The semiconductor device of the present embodiment differs from the conventional example in that the b) and the metal radiator plate (2) are fixed. Further, the polyimide resin layer (11) is characterized in that it contains granular crystalline silica (13) having a specific average particle size and content as a filler.
【００１０】図２は、ポリイミド系樹脂層（11）とエポ
キシ系樹脂層（12）から成る絶縁性樹脂層（10）を拡大
して示す。ポリイミド系樹脂層（11）はポリイミド系樹
脂（14）と結晶シリカ（13）とを含み、ポリイミド系樹
脂層（11）はエポキシ系樹脂層（12）よりも層厚であ
る。FIG. 2 shows an enlarged view of an insulating resin layer (10) comprising a polyimide resin layer (11) and an epoxy resin layer (12). The polyimide resin layer (11) contains a polyimide resin (14) and crystalline silica (13), and the polyimide resin layer (11) is thicker than the epoxy resin layer (12).
【００１１】本実施例では、結晶シリカ（13）は３０μ
ｍ程度の平均粒径でポリイミド系樹脂層（11)中に約４
０重量％含有される。ポリイミド系樹脂層（11）は約８
０μｍの厚みで形成され、ポリイミド系樹脂層（11）中
のポリイミド樹脂（14）は、結晶シリカ（13）の粒界間
に形成された空間を充填する。In this embodiment, the crystalline silica (13) has a thickness of 30 μm.
about 4 m in the polyimide resin layer (11)
0% by weight is contained. About 8 polyimide resin layers (11)
The polyimide resin (14) in the polyimide resin layer (11) is formed with a thickness of 0 μm and fills a space formed between grain boundaries of the crystalline silica (13).
【００１２】ボイド等の未充填部を発生せずに十分な絶
縁耐圧を与えるために、ポリイミド系樹脂層（11）の厚
さは５０μｍ以上必要である。また、結晶シリカ（13）
の平均粒径を３０μｍ程度にすると、ポリイミド系樹脂
層（11）を所望の厚さに歩留り良く形成できる。結晶シ
リカ（13）の平均粒径が１０μｍよりも小さいと、ポリ
イミド系樹脂層（11）の厚さが小さくなり過ぎ、平均粒
径が５０μｍよりも大きいと層厚が大きくなり過ぎて望
ましくない。The polyimide resin layer (11) needs to have a thickness of 50 μm or more in order to provide a sufficient dielectric strength without generating unfilled portions such as voids. In addition, crystalline silica (13)
When the average particle diameter of the polyimide resin is about 30 μm, the polyimide resin layer (11) can be formed to a desired thickness with a good yield. When the average particle size of the crystalline silica (13) is smaller than 10 μm, the thickness of the polyimide resin layer (11) becomes too small, and when the average particle size is larger than 50 μm, the layer thickness becomes too large, which is not desirable.
【００１３】結晶シリカ（13）の含有率が３０重量％よ
り小さいと、ポリイミド系樹脂層（11）の熱伝導性が低
下し、放熱性が損なわれる。また、溶剤の蒸発むら等に
起因して厚さが不均一となり、放熱板（2）の平面方向
にポリイミド系樹脂層（11）に薄い部分と厚い部分が形
成されることがある。一方、結晶シリカ（13）の含有率
が６０重量％より大きいと、樹脂分が少なく結晶シリカ
（13）の粒界間に形成された空間が十分にポリイミド系
樹脂（14）で完全に充填されず、ポリイミド系樹脂層
（11）の熱伝導性が減殺され、放熱性低下の原因となる
空孔が生じる。良好な放熱性の絶縁性樹脂層（10）を均
一な厚みで形成し且つボイドの発生を防止するため、ポ
リイミド系樹脂層（11）の結晶シリカ（13）含有率は、
３０〜６０重量％の範囲である。When the content of the crystalline silica (13) is less than 30% by weight, the heat conductivity of the polyimide resin layer (11) is reduced, and the heat radiation property is impaired. In addition, the thickness becomes uneven due to uneven evaporation of the solvent and the like, and a thin portion and a thick portion may be formed in the polyimide resin layer (11) in the plane direction of the heat sink (2). On the other hand, when the content of the crystalline silica (13) is more than 60% by weight, the space formed between the grain boundaries of the crystalline silica (13) has a small amount of resin and is sufficiently filled with the polyimide resin (14). Instead, the thermal conductivity of the polyimide-based resin layer (11) is reduced, and pores that cause a decrease in heat radiation are generated. In order to form an insulating resin layer (10) having a good heat dissipation with a uniform thickness and to prevent the generation of voids, the content of crystalline silica (13) in the polyimide resin layer (11) is as follows:
It is in the range of 30 to 60% by weight.
【００１４】また、エポキシ系樹脂層（12）はポリイミ
ド系樹脂層（11）の上面に約６０μｍの厚みで形成さ
れ、ポリイミド系樹脂層（11）に生じたピンホールを充
填し絶縁耐圧の向上に寄与する。The epoxy resin layer (12) is formed with a thickness of about 60 μm on the upper surface of the polyimide resin layer (11), and fills a pinhole generated in the polyimide resin layer (11) to improve the dielectric strength. To contribute.
【００１５】図１の半導体装置を製造する際、まず、半
導体素子（8）を一方の主面（5a）上に載置した金属製
の支持板（5）を有するリードフレーム組立体（1）と、
金属製の放熱板（2）とを用意する。次に、結晶シリカ
（13）を含有するポリイミド系樹脂（14）を放熱板
（2）の一方の主面（2a）に印刷した後、熱処理を施し
てポリイミド系樹脂層（11）を形成する。その後、ポリ
イミド系樹脂層（11）の上面に接着性のエポキシ系樹脂
を印刷した後、エポキシ系樹脂を介してリードフレーム
組立体（1）の他方の主面（5b）と放熱板（2）とを貼着
する。続いて、このエポキシ系樹脂に熱処理を施してエ
ポキシ系樹脂層（12）を形成すると同時に、ポリイミド
系樹脂層に生ずるボイド等の未充填部にエポキシ系樹脂
を充填する。支持板（5）は外部リード（6）に電気的に
接続され、外部リード（6）の先端を除いて周知のトラ
ンスファモールドにより樹脂封止体（3）で支持板
（5）、半導体素子（8）、放熱板（2）の一方の主面（2
a）及び一方の主面（2a）に対して直角な側面（2b）並
びに外部リード（6）の内端部（6a）を樹脂封止して図
１の半導体装置を完成する。得られた半導体装置では、
放熱板（2）とリードフレーム組立体（1）はポリイミド
系樹脂層（11）とエポキシ系樹脂層（12）を介して互い
に接着されている。In manufacturing the semiconductor device of FIG. 1, first, a lead frame assembly (1) having a metal support plate (5) on which a semiconductor element (8) is mounted on one main surface (5a) is provided. When,
Prepare a metal heat sink (2). Next, after a polyimide resin (14) containing crystalline silica (13) is printed on one main surface (2a) of the heat sink (2), a heat treatment is performed to form a polyimide resin layer (11). . Then, after printing an adhesive epoxy resin on the upper surface of the polyimide resin layer (11), the other main surface (5b) of the lead frame assembly (1) and the heat sink (2) are interposed via the epoxy resin. And stick it. Subsequently, the epoxy resin is subjected to a heat treatment to form an epoxy resin layer (12), and at the same time, an unfilled portion such as a void generated in the polyimide resin layer is filled with the epoxy resin. The support plate (5) is electrically connected to the external lead (6). Except for the tip of the external lead (6), the support plate (5) and the semiconductor element ( 8), one main surface of the heat sink (2) (2
a) and the side surface (2b) perpendicular to the one main surface (2a) and the inner end (6a) of the external lead (6) are sealed with resin to complete the semiconductor device of FIG. In the obtained semiconductor device,
The heat sink (2) and the lead frame assembly (1) are bonded to each other via a polyimide resin layer (11) and an epoxy resin layer (12).
【００１６】本発明の実施態様は前記の実施例に限定さ
れず、変更が可能である。例えば、ポリイミド系樹脂層
（11）及びエポキシ系樹脂層（12）はリードフレーム
（7）と放熱板（2）が対向する領域にのみ形成しても良
い。エポキシ系樹脂層（12）は、ポリイミド系樹脂層
（11）のピンホール等を充填できるように６０μｍ以上
にするのが望ましいが、放熱性が損なわれないように８
０μｍ以下にするのが望ましい。また、エポキシ系樹脂
層（12）にも結晶シリカを比較的高い含有率で含有させ
て、更に放熱性を向上させてもよい。この場合、エポキ
シ系樹脂層は１００μｍ程度の厚みで形成できる。The embodiment of the present invention is not limited to the above-described embodiment, but can be modified. For example, the polyimide resin layer (11) and the epoxy resin layer (12) may be formed only in a region where the lead frame (7) and the heat sink (2) are opposed. The epoxy resin layer (12) is desirably 60 μm or more so as to be able to fill pinholes or the like of the polyimide resin layer (11).
It is desirable that the thickness be 0 μm or less. Also, the epoxy resin layer (12) may contain crystalline silica at a relatively high content to further improve heat dissipation. In this case, the epoxy resin layer can be formed with a thickness of about 100 μm.
【００１７】[0017]
【発明の効果】前述のように、本発明によれば、熱処理
されたエポキシ系樹脂層は、ポリイミド系樹脂層に生ず
るボイド等の未充填部に侵入してこれを充填しているた
め、ボイドのない均一な層厚でポリイミド系樹脂層を形
成することができると共に、絶縁性樹脂層の嵩密度が増
加して絶縁性樹脂層の熱伝導性及び機械的強度が増加す
る作用がある。このように、支持板と放熱板との間に形
成した絶縁性樹脂層は良好な熱伝導性と十分な絶縁耐圧
を有するので、半導体装置の熱破壊及び絶縁不良を十分
に抑制することができ、半導体装置の信頼性を向上する
ことができる。また、放熱板とエポキシ系樹脂層との間
に配置されたポリイミド系樹脂層は１０〜５０μｍの平
均粒径を有する結晶シリカを含むため、ポリイミド系樹
脂層を薄く形成でき、必要な絶縁耐圧を得ると同時に、
支持板に固着された半導体素子から発生する熱を結晶シ
リカを通じて効率良く放熱板に伝達することができる。
この場合に、ポリイミド系樹脂層は熱伝導性のよい３０
〜６０重量％の結晶シリカを含有するため、絶縁性樹脂
層の熱伝導性は一層良好となる。As described above, according to the present invention, the heat-treated epoxy resin layer penetrates and fills unfilled portions such as voids generated in the polyimide resin layer. The polyimide resin layer can be formed with a uniform thickness without any problem, and the bulk density of the insulating resin layer increases, thereby increasing the thermal conductivity and mechanical strength of the insulating resin layer. As described above, since the insulating resin layer formed between the support plate and the heat sink has good thermal conductivity and sufficient withstand voltage, thermal breakdown and insulation failure of the semiconductor device can be sufficiently suppressed. As a result, the reliability of the semiconductor device can be improved. In addition, since the polyimide resin layer disposed between the heat sink and the epoxy resin layer contains crystalline silica having an average particle size of 10 to 50 μm, the polyimide resin layer can be formed thin, and the required dielectric strength is reduced. At the same time
Heat generated from the semiconductor element fixed to the support plate can be efficiently transmitted to the heat sink through the crystalline silica.
In this case, the polyimide-based resin layer has good heat conductivity.
The thermal conductivity of the insulating resin layer is further improved because it contains シ リ カ 60% by weight of crystalline silica.
【図１】 本発明により製造した半導体装置の断面図FIG. 1 is a cross-sectional view of a semiconductor device manufactured according to the present invention.
【図２】 図１に示す絶縁性樹脂層の拡大断面図FIG. 2 is an enlarged sectional view of the insulating resin layer shown in FIG.
【図３】 従来の半導体装置の断面図FIG. 3 is a cross-sectional view of a conventional semiconductor device.
（1）・・リードフレーム組立体、 （2）・・放熱板、
（3）・・樹脂封止体、 （5）・・支持板、 （7）
・・リードフレーム、 （8）・・半導体素子、 （1
0）・絶縁性樹脂層、 （11）・・ポリイミド系樹脂
層、 （12）・・エポキシ系樹脂層、 （13）・・結晶
シリカ、 （14）・・ポリイミド系樹脂、(1) ··· lead frame assembly, (2) · · heat sink,
(3) ··· Resin sealed body, (5) ··· Support plate, (7)
..Lead frames, (8) Semiconductor devices, (1)
0)-insulating resin layer, (11)-polyimide resin layer, (12)-epoxy resin layer, (13)-crystalline silica, (14)-polyimide resin,
Claims (4)
に載置した金属製の支持板（5）を有するリードフレー
ム組立体（1）と、金属製の放熱板（2）とを用意する工
程と、 結晶シリカ（13）を含有するポリイミド系樹脂（14）を
前記放熱板（2）の一方の主面（2a）上に印刷した後、
熱処理を施してポリイミド系樹脂層（11）を形成する工
程と、 前記ポリイミド系樹脂層（11）の上面に接着性のエポキ
シ系樹脂を印刷した後、該エポキシ系樹脂を介して放熱
板（2）と前記リードフレーム組立体（1）の前記支持板
（5）の他方の主面（5b）とを貼着する工程と、 前記エポキシ系樹脂に熱処理を施してエポキシ系樹脂層
（12）を形成すると同時に、前記ポリイミド系樹脂層
（11）に生ずるボイド等の未充填部に前記エポキシ系樹
脂を充填する工程とを含むことを特徴とする半導体装置
の製造方法。1. A lead frame assembly (1) having a metal support plate (5) having a semiconductor element (8) mounted on one main surface (5a), and a metal radiator plate (2). Preparing a polyimide resin (14) containing crystalline silica (13) on one main surface (2a) of the heat sink (2);
Heat treating to form a polyimide resin layer (11); and printing an adhesive epoxy resin on the upper surface of the polyimide resin layer (11). A) bonding the other main surface (5b) of the support plate (5) of the lead frame assembly (1) to the epoxy resin and subjecting the epoxy resin to a heat treatment to form an epoxy resin layer (12). Filling the unfilled portion of the polyimide resin layer (11), such as voids, with the epoxy resin at the same time as forming the semiconductor device.
５０μｍの平均粒径を有する３０〜６０重量％の結晶シ
リカを混入する工程を含む請求項１に記載の半導体装置
の製造方法。2. The polyimide resin layer (11) has a thickness of 10 to 10.
2. The method according to claim 1, further comprising the step of mixing 30 to 60% by weight of crystalline silica having an average particle diameter of 50 [mu] m.
続し、支持板（5）、半導体素子（8）、放熱板（2）の
一方の主面（2a）及び一方の主面（2a）に対して直角な
側面（2b）並びに外部リード（6）の内端部（6a）を樹
脂封止体（3）により封止する工程を含む請求項１に記
載の半導体装置の製造方法。3. The support plate (5) is connected to an external lead (6), and one main surface (2a) and one main surface of the support plate (5), the semiconductor element (8), and the heat sink (2) are provided. 2. The semiconductor device according to claim 1, further comprising a step of sealing the side surface (2b) perpendicular to the surface (2a) and the inner end (6a) of the external lead (6) with a resin sealing body (3). Production method.
ポキシ系樹脂層（12）よりも層厚である請求項１に記載
の半導体装置の製造方法。4. The method according to claim 1, wherein the polyimide resin layer has a thickness greater than that of the epoxy resin layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10133428A JP3097845B2 (en) | 1998-05-15 | 1998-05-15 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10133428A JP3097845B2 (en) | 1998-05-15 | 1998-05-15 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1167994A true JPH1167994A (en) | 1999-03-09 |
| JP3097845B2 JP3097845B2 (en) | 2000-10-10 |
Family
ID=15104551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10133428A Expired - Fee Related JP3097845B2 (en) | 1998-05-15 | 1998-05-15 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3097845B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012248568A (en) * | 2011-05-25 | 2012-12-13 | Sanken Electric Co Ltd | Heat dissipation substrate, method for manufacturing the same, and semiconductor module |
-
1998
- 1998-05-15 JP JP10133428A patent/JP3097845B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012248568A (en) * | 2011-05-25 | 2012-12-13 | Sanken Electric Co Ltd | Heat dissipation substrate, method for manufacturing the same, and semiconductor module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3097845B2 (en) | 2000-10-10 |
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