JPH1167761A - Metallic wiring of semiconductor device and method for forming the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a metallic wiring for a semiconductor device having improved reliability and a method for forming the same. SOLUTION: This metallic wiring includes a first conductive layer 24a, formed on a substrate 21 and a plurality of second conductive layers 26a, formed in the first conductive layer 24a. To form the metallic wiring such as this, the first step of forming a plurality of holes and the second step of forming the second conductive layers are conducted. In the first step, the first conductive layer 24a is formed on the substrate 21 and then in the second step it is selectively patterned, such that the surface of the substrate 21 is exposed to form a plurality of holes.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal wiring of a semiconductor integrated circuit, and more particularly to a metal wiring of a semiconductor device and a method of forming the same, which improve reliability of the metal wiring.

[0002]

2. Description of the Related Art In general, aluminum and aluminum alloys are most frequently used in a semiconductor device manufacturing process. The reason is that not only the electric conductivity is good, the adhesive force with the oxide film is excellent, but also the molding is easy.

[0003] However, aluminum and aluminum alloys have a problem that electrical mass transfer, hillocks and spikes occur. When a current is applied to the aluminum for the metal wiring, diffusion of aluminum atoms occurs in a high current density region such as a contact region with silicon or a staircase region, and the metal wire at that portion becomes thin, and finally a short circuit occurs. Is generated. Such a phenomenon is called electric mass transfer (electromigration), and the diffusion of aluminum atoms occurs gradually, and is induced after a considerable time has passed since the current was passed through the metal wiring.

In order to solve the above problems,
Aluminum with a small amount of copper (Cu) added to aluminum
Use copper alloy or use Step Coverage (S
It is only necessary to improve the tepcoverage) and design the contact area sufficiently wide.

Another problem in the case of using aluminum for the metal wiring is that mass transfer of silicon to the aluminum thin film occurs during heat treatment, and the silicon locally reacts excessively with aluminum to destroy the element. There is. Such a phenomenon is called spike.

[0006] The problem with the spikes is to use an aluminum-silicon alloy to which silicon is added above the solubility or to insert a thin metal layer (TiW, PtSi) between aluminum and silicon to form a diffusion barrier. It can be solved by making.

Hereinafter, a conventional metal wiring of a semiconductor device and a method of forming the same will be described with reference to the accompanying drawings. FIG. 1 is a plan view showing a metal wiring of a conventional semiconductor device, and FIG.
2A to 2B are cross-sectional views illustrating a conventional method for metal wiring of a semiconductor device.

As shown in FIGS. 1 and 2b, the conventional semiconductor device includes an oxide film 12 formed on a semiconductor substrate 11, and a barrier layer 13 formed in a predetermined region on the oxide film 12. And aluminum layer 14 and top AR
C layer (Anti-Reflective Coating Layer)
15 is provided.

To form a metal wiring of a conventional semiconductor device, an oxide film 1 is formed on a semiconductor substrate 11 as shown in FIG.
2, and a barrier layer 13, an aluminum layer 14, and a top ARC layer 15 are sequentially formed on the oxide film 12.

Next, a photoresist 16 is applied to the entire surface of the semiconductor substrate 11 including the top ARC layer 15,
The photoresist 16 is patterned by exposure and development steps.

Further, as shown in FIG. 2B, using the patterned photoresist 16 as a mask, the top ARC layer 15, the aluminum layer 14 and the barrier layer 13 are selectively removed to form the metal wiring 10. I do.

[0012]

However, such a conventional metal wiring of a semiconductor device and a method of forming the same have the following problems.

That is, when the integration of a semiconductor integrated circuit is improved and the width of the metal wiring is narrowed and the current density flowing in the same area is increased, when electric mass transfer is induced from the metal wiring. , Voids and an accumulation layer of atoms are generated, which lowers the reliability of the metal wiring.

The present invention has been devised to solve the above-described problems. The present invention improves the electrical mass transfer characteristics of metal wiring by utilizing the backflow effect, and improves the performance of metal wiring. It is an object of the present invention to provide a metal wiring of a semiconductor device and a method for forming the same, which improve reliability.

[0015]

According to a first aspect of the present invention, there is provided a semiconductor device comprising a first conductive layer formed on a substrate and a first conductive layer formed on the substrate. It is characterized by comprising a plurality of formed second conductive layers.

According to a second aspect of the present invention, in the metal wiring, the second conductive layer is formed to have the same thickness as the first conductive layer, and is arranged at intervals corresponding to a brush length. .

In a third aspect of the present invention, the first conductive layer is formed of aluminum or an aluminum alloy, and the second conductive layer is formed of tungsten.

According to a fourth aspect of the present invention, there is provided a method for forming a metal wiring of a semiconductor device, comprising: forming a first conductive layer on a substrate;
Forming a plurality of holes by selectively patterning the first conductive layer so that a surface of the substrate is exposed;
And a second step of forming a second conductive layer in the plurality of holes.

According to the method of the fifth aspect, the plurality of holes are formed at intervals corresponding to a brush length.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a metal wiring of a semiconductor device and a method of forming the same according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a plan view showing a metal wiring of the semiconductor device according to the present invention, and FIGS. 4a, 4b, 4c and 4d.
FIG. 4 is a cross-sectional view showing a process of a method for forming a metal wiring of a semiconductor device according to the present invention.

First, as shown in FIGS. 3 and 4D, a semiconductor device according to the present invention is formed on an oxide film 22 and a barrier layer 23 sequentially formed on a semiconductor substrate 21, and on the barrier layer 23. Blech len
gth) having a plurality of aluminum patterns 24a having a plurality of holes formed at intervals corresponding to gth), that is, a first conductive layer, and a tungsten plug 26a formed in each hole, that is, a second conductive layer. I have.

The barrier layer 23 is made of titanium nitride (TiN), and
4a is formed from aluminum or an aluminum alloy. The width of the tungsten plug 26a is equal to or smaller than the width of the aluminum pattern 24a, and the thickness of the tungsten plug 26a is equal to the thickness of the aluminum pattern 24a.

In the method of forming a metal wiring of a semiconductor device configured as described above, first, as shown in FIG. 4A, an oxide film 22 is formed on a semiconductor substrate 21, and a barrier layer 23 is formed on the oxide film 22. An aluminum layer (not shown) is sequentially deposited.

Next, the aluminum layer is patterned by photolithography and etching to form a plurality of aluminum lines 24 having a constant interval. The aluminum line 24 forms a metal wiring.

After a photoresist 25 is applied on the aluminum line 24, the photoresist 25 is patterned by an exposure and development process.
Referring to FIG. 4B, a plurality of aluminum patterns 24a having a plurality of holes are formed by using the patterned photoresist 25 as a mask and patterning the aluminum lines 24 to have a brush length. .

Here, the aluminum pattern 24a is formed using aluminum or an aluminum alloy (for example, AlCu, AlCuTi, etc.). As shown in FIG. 4C, the photoresist 25 is removed, and the entire surface of the semiconductor substrate 21 including the plurality of holes between the plurality of aluminum patterns 24a is formed by CVD (chemical vapor deposition).
Deposits a tungsten film 26.

Next, as shown in FIG. 4D, the entire surface of the tungsten film 26 is subjected to an etch-back process, chemical mechanical polishing (CMP), or the like to form holes in the plurality of aluminum lines 24. To
By forming the tungsten plug 26a, the aluminum pattern 24a and the tungsten plug 26 are formed.
Then, a plurality of metal wirings composed of a.

When a current is applied to the metal wiring of the semiconductor device configured as described above, a current flows from the aluminum pattern 24a on one side to the aluminum pattern 24a on the other side. Here, a current flows from the aluminum pattern 24a on one side to the aluminum pattern 24a on the other side through the tungsten plug 26a formed between the aluminum patterns 24a.

The aluminum pattern 24a
When electrons flow in one direction through a tungsten plug 26a that electrically connects
The back flow effect occurs due to the plug 26a formed in the 4a, and electrons move in the opposite direction (the other side direction).
Therefore, the amount of electrons input to the tungsten plug 26a is the same as the amount of electrons output.

This is because the amount of movement of atoms due to the backflow effect is equal to the amount of movement of atoms due to electromigration. That is, a discontinuous portion of the current flow at the brush length (tungsten plug 2
By forming 6a), the amount of atoms generated due to the movement of atoms due to electromigration and the amount of movement of atoms due to the backflow effect are maintained the same, so that the amount of stored atoms is substantially reduced. Be reduced. Thereby, the flow (current) of electrons becomes smooth, and generation of voids and accumulation layers is suppressed.

[0032]

The metal wiring of the semiconductor device and the method of forming the same according to the present invention have the following effects.

In the first and fourth aspects of the present invention,
By inserting the second conductive layer in the first conductive layer, the generation of voids and accumulation layers can be prevented by utilizing the backflow effect, and therefore, the reliability of the metal wiring can be improved.

In the second and fifth aspects of the present invention,
By arranging the second conductive layer on the first conductive layer at intervals corresponding to the brush length, an optimal backflow effect can be obtained.

According to the third aspect of the present invention, by forming the second conductive material from tungsten and the first conductive layer from aluminum, it is possible to improve the electric conductivity and the adhesive force with the insulating film. it can.

[Brief description of the drawings]

FIG. 1 is a plan view showing a metal wiring of a conventional semiconductor device;

2A and 2B are cross-sectional views showing steps of a conventional method for forming a metal wiring of a semiconductor device.

FIG. 3 is a plan view showing metal wiring of a semiconductor device according to the present invention;

FIGS. 4A, 4B, 4C, and 4D are cross-sectional views showing steps of a method for forming a metal wiring of a semiconductor device according to the present invention.

[Explanation of symbols]

21: semiconductor substrate, 22: oxide film, 23: barrier layer, 2
4: aluminum line, 24a: aluminum pattern, 25: photoresist, 26: tungsten film, 2
6a: Tungsten plug.

Claims (5)

[Claims] 1. A metal wiring for a semiconductor device, comprising: a first conductive layer formed on a substrate; and a plurality of second conductive layers formed in the first conductive layer. . 2. The device according to claim 1, wherein the second conductive layer is formed to have the same thickness as the first conductive layer, and is arranged at intervals corresponding to a brush length. Metal wiring for semiconductor devices. 3. The metal wiring according to claim 1, wherein the first conductive layer is formed of aluminum or an aluminum alloy, and the second conductive layer is formed of tungsten. 4. A first step of forming a first conductive layer on a substrate and then selectively patterning the first conductive layer to form a plurality of holes such that a surface of the substrate is exposed. And a second step of forming a second conductive layer in the plurality of holes. 5. The apparatus according to claim 4, wherein the plurality of holes are formed at intervals corresponding to a brush length.
A method for forming a metal wiring of a semiconductor device according to the above.