JPH11509955A5 - - Google Patents

Info

Publication number
JPH11509955A5
JPH11509955A5 JP1997542260A JP54226097A JPH11509955A5 JP H11509955 A5 JPH11509955 A5 JP H11509955A5 JP 1997542260 A JP1997542260 A JP 1997542260A JP 54226097 A JP54226097 A JP 54226097A JP H11509955 A5 JPH11509955 A5 JP H11509955A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1997542260A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11509955A (ja
JP3848374B2 (ja
Publication date
Application filed filed Critical
Priority claimed from PCT/US1996/007490 external-priority patent/WO1997044791A1/en
Publication of JPH11509955A publication Critical patent/JPH11509955A/ja
Publication of JPH11509955A5 publication Critical patent/JPH11509955A5/ja
Application granted granted Critical
Publication of JP3848374B2 publication Critical patent/JP3848374B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP54226097A 1996-05-22 1996-05-22 フローティングゲートメモリの集積回路 Expired - Lifetime JP3848374B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1996/007490 WO1997044791A1 (en) 1996-05-22 1996-05-22 Flash memory erase with controlled band-to-band tunneling current

Publications (3)

Publication Number Publication Date
JPH11509955A JPH11509955A (ja) 1999-08-31
JPH11509955A5 true JPH11509955A5 (enrdf_load_html_response) 2004-07-15
JP3848374B2 JP3848374B2 (ja) 2006-11-22

Family

ID=22255145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54226097A Expired - Lifetime JP3848374B2 (ja) 1996-05-22 1996-05-22 フローティングゲートメモリの集積回路

Country Status (4)

Country Link
EP (1) EP0840929B1 (enrdf_load_html_response)
JP (1) JP3848374B2 (enrdf_load_html_response)
DE (1) DE69618206T2 (enrdf_load_html_response)
WO (1) WO1997044791A1 (enrdf_load_html_response)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6385093B1 (en) * 2001-03-30 2002-05-07 Advanced Micro Devices, Inc. I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
TWI679647B (zh) * 2019-01-24 2019-12-11 華邦電子股份有限公司 抹除方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0447595A (ja) * 1990-06-15 1992-02-17 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3105109B2 (ja) * 1993-05-19 2000-10-30 株式会社東芝 不揮発性半導体記憶装置
US5424993A (en) * 1993-11-15 1995-06-13 Micron Technology, Inc. Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory device
US5416738A (en) * 1994-05-27 1995-05-16 Alliance Semiconductor Corporation Single transistor flash EPROM cell and method of operation
US5487033A (en) * 1994-06-28 1996-01-23 Intel Corporation Structure and method for low current programming of flash EEPROMS
US5485423A (en) * 1994-10-11 1996-01-16 Advanced Micro Devices, Inc. Method for eliminating of cycling-induced electron trapping in the tunneling oxide of 5 volt only flash EEPROMS

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